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120
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1 ; RUN: llc -march=amdgcn -verify-machineinstrs < %s | FileCheck -check-prefixes=GCN,SI,FUNC %s
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2 ; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefixes=GCN,VI,FUNC %s
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121
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3 ; RUN: llc -march=r600 -mcpu=redwood -verify-machineinstrs < %s | FileCheck -check-prefix=EG -check-prefix=FUNC %s
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120
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4
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5 ; FUNC-LABEL: {{^}}local_load_i16:
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6 ; GCN: ds_read_u16 v{{[0-9]+}}
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7
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8 ; EG: MOV {{[* ]*}}[[FROM:T[0-9]+\.[XYZW]]], KC0[2].Z
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9 ; EG: LDS_USHORT_READ_RET {{.*}} [[FROM]]
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10 ; EG-DAG: MOV {{[* ]*}}[[DATA:T[0-9]+\.[XYZW]]], OQAP
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11 ; EG-DAG: MOV {{[* ]*}}[[TO:T[0-9]+\.[XYZW]]], KC0[2].Y
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12 ; EG: LDS_SHORT_WRITE {{\*?}} [[TO]], [[DATA]]
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121
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13 define amdgpu_kernel void @local_load_i16(i16 addrspace(3)* %out, i16 addrspace(3)* %in) {
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120
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14 entry:
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15 %ld = load i16, i16 addrspace(3)* %in
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16 store i16 %ld, i16 addrspace(3)* %out
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17 ret void
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18 }
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19
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20 ; FUNC-LABEL: {{^}}local_load_v2i16:
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21 ; GCN: ds_read_b32
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22
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23 ; EG: MOV {{[* ]*}}[[FROM:T[0-9]+\.[XYZW]]], KC0[2].Z
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24 ; EG: LDS_READ_RET {{.*}} [[FROM]]
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25 ; EG-DAG: MOV {{[* ]*}}[[DATA:T[0-9]+\.[XYZW]]], OQAP
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26 ; EG-DAG: MOV {{[* ]*}}[[TO:T[0-9]+\.[XYZW]]], KC0[2].Y
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27 ; EG: LDS_WRITE {{\*?}} [[TO]], [[DATA]]
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121
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28 define amdgpu_kernel void @local_load_v2i16(<2 x i16> addrspace(3)* %out, <2 x i16> addrspace(3)* %in) {
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120
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29 entry:
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30 %ld = load <2 x i16>, <2 x i16> addrspace(3)* %in
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31 store <2 x i16> %ld, <2 x i16> addrspace(3)* %out
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32 ret void
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33 }
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34
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35 ; FUNC-LABEL: {{^}}local_load_v3i16:
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36 ; GCN: ds_read_b64
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37 ; GCN-DAG: ds_write_b32
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38 ; GCN-DAG: ds_write_b16
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39
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40 ; EG-DAG: LDS_USHORT_READ_RET
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41 ; EG-DAG: LDS_READ_RET
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121
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42 define amdgpu_kernel void @local_load_v3i16(<3 x i16> addrspace(3)* %out, <3 x i16> addrspace(3)* %in) {
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120
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43 entry:
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44 %ld = load <3 x i16>, <3 x i16> addrspace(3)* %in
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45 store <3 x i16> %ld, <3 x i16> addrspace(3)* %out
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46 ret void
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47 }
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48
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49 ; FUNC-LABEL: {{^}}local_load_v4i16:
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50 ; GCN: ds_read_b64
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51
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52 ; EG: LDS_READ_RET
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53 ; EG: LDS_READ_RET
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121
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54 define amdgpu_kernel void @local_load_v4i16(<4 x i16> addrspace(3)* %out, <4 x i16> addrspace(3)* %in) {
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120
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55 entry:
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56 %ld = load <4 x i16>, <4 x i16> addrspace(3)* %in
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57 store <4 x i16> %ld, <4 x i16> addrspace(3)* %out
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58 ret void
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59 }
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60
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61 ; FUNC-LABEL: {{^}}local_load_v8i16:
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62 ; GCN: ds_read2_b64 v{{\[[0-9]+:[0-9]+\]}}, v{{[0-9]+}} offset1:1{{$}}
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63
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64 ; EG: LDS_READ_RET
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65 ; EG: LDS_READ_RET
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66 ; EG: LDS_READ_RET
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67 ; EG: LDS_READ_RET
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121
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68 define amdgpu_kernel void @local_load_v8i16(<8 x i16> addrspace(3)* %out, <8 x i16> addrspace(3)* %in) {
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120
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69 entry:
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70 %ld = load <8 x i16>, <8 x i16> addrspace(3)* %in
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71 store <8 x i16> %ld, <8 x i16> addrspace(3)* %out
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72 ret void
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73 }
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74
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75 ; FUNC-LABEL: {{^}}local_load_v16i16:
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76 ; GCN-DAG: ds_read2_b64 v{{\[[0-9]+:[0-9]+\]}}, v{{[0-9]+}} offset1:3{{$}}
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77 ; GCN-DAG: ds_read2_b64 v{{\[[0-9]+:[0-9]+\]}}, v{{[0-9]+}} offset0:1 offset1:2{{$}}
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78
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79
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80 ; EG: LDS_READ_RET
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81 ; EG: LDS_READ_RET
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82 ; EG: LDS_READ_RET
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83 ; EG: LDS_READ_RET
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84
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85 ; EG: LDS_READ_RET
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86 ; EG: LDS_READ_RET
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87 ; EG: LDS_READ_RET
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88 ; EG: LDS_READ_RET
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121
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89 define amdgpu_kernel void @local_load_v16i16(<16 x i16> addrspace(3)* %out, <16 x i16> addrspace(3)* %in) {
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120
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90 entry:
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91 %ld = load <16 x i16>, <16 x i16> addrspace(3)* %in
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92 store <16 x i16> %ld, <16 x i16> addrspace(3)* %out
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93 ret void
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94 }
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95
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96 ; FUNC-LABEL: {{^}}local_zextload_i16_to_i32:
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97 ; GCN: ds_read_u16
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98 ; GCN: ds_write_b32
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99
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100 ; EG: MOV {{[* ]*}}[[FROM:T[0-9]+\.[XYZW]]], KC0[2].Z
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101 ; EG: LDS_USHORT_READ_RET {{.*}} [[FROM]]
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102 ; EG-DAG: MOV {{[* ]*}}[[DATA:T[0-9]+\.[XYZW]]], OQAP
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103 ; EG-DAG: MOV {{[* ]*}}[[TO:T[0-9]+\.[XYZW]]], KC0[2].Y
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104 ; EG: LDS_WRITE {{\*?}} [[TO]], [[DATA]]
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121
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105 define amdgpu_kernel void @local_zextload_i16_to_i32(i32 addrspace(3)* %out, i16 addrspace(3)* %in) #0 {
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120
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106 %a = load i16, i16 addrspace(3)* %in
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107 %ext = zext i16 %a to i32
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108 store i32 %ext, i32 addrspace(3)* %out
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109 ret void
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110 }
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111
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112 ; FUNC-LABEL: {{^}}local_sextload_i16_to_i32:
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113 ; GCN-NOT: s_wqm_b64
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114 ; GCN: s_mov_b32 m0
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115 ; GCN: ds_read_i16
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116
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117 ; EG: MOV {{[* ]*}}[[FROM:T[0-9]+\.[XYZW]]], KC0[2].Z
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118 ; EG: LDS_USHORT_READ_RET {{.*}} [[FROM]]
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119 ; EG-DAG: MOV {{[* ]*}}[[TMP:T[0-9]+\.[XYZW]]], OQAP
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120 ; EG-DAG: MOV {{[* ]*}}[[TO:T[0-9]+\.[XYZW]]], KC0[2].Y
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121 ; EG-DAG: BFE_INT {{[* ]*}}[[DATA:T[0-9]+\.[XYZW]]], {{.*}}, 0.0, literal
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122 ; EG: 16
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123 ; EG: LDS_WRITE {{\*?}} [[TO]], [[DATA]]
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121
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124 define amdgpu_kernel void @local_sextload_i16_to_i32(i32 addrspace(3)* %out, i16 addrspace(3)* %in) #0 {
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120
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125 %a = load i16, i16 addrspace(3)* %in
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126 %ext = sext i16 %a to i32
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127 store i32 %ext, i32 addrspace(3)* %out
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128 ret void
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129 }
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130
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131 ; FUNC-LABEL: {{^}}local_zextload_v1i16_to_v1i32:
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132 ; GCN: ds_read_u16
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133
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134 ; EG: MOV {{[* ]*}}[[FROM:T[0-9]+\.[XYZW]]], KC0[2].Z
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135 ; EG: LDS_USHORT_READ_RET {{.*}} [[FROM]]
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136 ; EG-DAG: MOV {{[* ]*}}[[DATA:T[0-9]+\.[XYZW]]], OQAP
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137 ; EG-DAG: MOV {{[* ]*}}[[TO:T[0-9]+\.[XYZW]]], KC0[2].Y
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138 ; EG: LDS_WRITE {{\*?}} [[TO]], [[DATA]]
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121
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139 define amdgpu_kernel void @local_zextload_v1i16_to_v1i32(<1 x i32> addrspace(3)* %out, <1 x i16> addrspace(3)* %in) #0 {
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120
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140 %load = load <1 x i16>, <1 x i16> addrspace(3)* %in
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141 %ext = zext <1 x i16> %load to <1 x i32>
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142 store <1 x i32> %ext, <1 x i32> addrspace(3)* %out
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143 ret void
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144 }
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145
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146 ; FUNC-LABEL: {{^}}local_sextload_v1i16_to_v1i32:
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147 ; GCN: ds_read_i16
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148
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149 ; EG: MOV {{[* ]*}}[[FROM:T[0-9]+\.[XYZW]]], KC0[2].Z
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150 ; EG: LDS_USHORT_READ_RET {{.*}} [[FROM]]
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151 ; EG-DAG: MOV {{[* ]*}}[[TMP:T[0-9]+\.[XYZW]]], OQAP
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152 ; EG-DAG: MOV {{[* ]*}}[[TO:T[0-9]+\.[XYZW]]], KC0[2].Y
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153 ; EG-DAG: BFE_INT {{[* ]*}}[[DATA:T[0-9]+\.[XYZW]]], {{.*}}, 0.0, literal
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154 ; EG: 16
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155 ; EG: LDS_WRITE {{\*?}} [[TO]], [[DATA]]
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121
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156 define amdgpu_kernel void @local_sextload_v1i16_to_v1i32(<1 x i32> addrspace(3)* %out, <1 x i16> addrspace(3)* %in) #0 {
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120
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157 %load = load <1 x i16>, <1 x i16> addrspace(3)* %in
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158 %ext = sext <1 x i16> %load to <1 x i32>
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159 store <1 x i32> %ext, <1 x i32> addrspace(3)* %out
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160 ret void
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161 }
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162
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163 ; FUNC-LABEL: {{^}}local_zextload_v2i16_to_v2i32:
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164 ; GCN-NOT: s_wqm_b64
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165 ; GCN: s_mov_b32 m0
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166 ; GCN: ds_read_b32
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167
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168 ; EG: LDS_READ_RET
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121
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169 define amdgpu_kernel void @local_zextload_v2i16_to_v2i32(<2 x i32> addrspace(3)* %out, <2 x i16> addrspace(3)* %in) #0 {
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120
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170 %load = load <2 x i16>, <2 x i16> addrspace(3)* %in
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171 %ext = zext <2 x i16> %load to <2 x i32>
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172 store <2 x i32> %ext, <2 x i32> addrspace(3)* %out
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173 ret void
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174 }
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175
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176 ; FUNC-LABEL: {{^}}local_sextload_v2i16_to_v2i32:
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177 ; GCN-NOT: s_wqm_b64
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178 ; GCN: s_mov_b32 m0
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179 ; GCN: ds_read_b32
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180
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181 ; EG: LDS_READ_RET
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182 ; EG: BFE_INT
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183 ; EG: BFE_INT
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121
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184 define amdgpu_kernel void @local_sextload_v2i16_to_v2i32(<2 x i32> addrspace(3)* %out, <2 x i16> addrspace(3)* %in) #0 {
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120
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185 %load = load <2 x i16>, <2 x i16> addrspace(3)* %in
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186 %ext = sext <2 x i16> %load to <2 x i32>
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187 store <2 x i32> %ext, <2 x i32> addrspace(3)* %out
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188 ret void
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189 }
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190
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191 ; FUNC-LABEL: {{^}}local_local_zextload_v3i16_to_v3i32:
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192 ; GCN: ds_read_b64
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193 ; GCN-DAG: ds_write_b32
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194 ; GCN-DAG: ds_write_b64
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195
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196 ; EG: LDS_READ_RET
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121
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197 define amdgpu_kernel void @local_local_zextload_v3i16_to_v3i32(<3 x i32> addrspace(3)* %out, <3 x i16> addrspace(3)* %in) {
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120
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198 entry:
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199 %ld = load <3 x i16>, <3 x i16> addrspace(3)* %in
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200 %ext = zext <3 x i16> %ld to <3 x i32>
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201 store <3 x i32> %ext, <3 x i32> addrspace(3)* %out
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202 ret void
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203 }
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204
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205 ; FUNC-LABEL: {{^}}local_local_sextload_v3i16_to_v3i32:
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206 ; GCN: ds_read_b64
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207 ; GCN-DAG: ds_write_b32
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208 ; GCN-DAG: ds_write_b64
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209
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210 ; EG: LDS_READ_RET
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211 ; EG-DAG: BFE_INT
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212 ; EG-DAG: BFE_INT
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213 ; EG-DAG: BFE_INT
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121
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214 define amdgpu_kernel void @local_local_sextload_v3i16_to_v3i32(<3 x i32> addrspace(3)* %out, <3 x i16> addrspace(3)* %in) {
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120
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215 entry:
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216 %ld = load <3 x i16>, <3 x i16> addrspace(3)* %in
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217 %ext = sext <3 x i16> %ld to <3 x i32>
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218 store <3 x i32> %ext, <3 x i32> addrspace(3)* %out
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219 ret void
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220 }
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221
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222 ; FUNC-LABEL: {{^}}local_local_zextload_v4i16_to_v4i32:
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223 ; GCN-NOT: s_wqm_b64
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224 ; GCN: s_mov_b32 m0
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225 ; GCN: ds_read_b64
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226
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227 ; EG: LDS_READ_RET
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228 ; EG: LDS_READ_RET
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121
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229 define amdgpu_kernel void @local_local_zextload_v4i16_to_v4i32(<4 x i32> addrspace(3)* %out, <4 x i16> addrspace(3)* %in) #0 {
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120
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230 %load = load <4 x i16>, <4 x i16> addrspace(3)* %in
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231 %ext = zext <4 x i16> %load to <4 x i32>
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232 store <4 x i32> %ext, <4 x i32> addrspace(3)* %out
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233 ret void
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234 }
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235
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236 ; FUNC-LABEL: {{^}}local_sextload_v4i16_to_v4i32:
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237 ; GCN-NOT: s_wqm_b64
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238 ; GCN: s_mov_b32 m0
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239 ; GCN: ds_read_b64
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240
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241 ; EG: LDS_READ_RET
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242 ; EG: LDS_READ_RET
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243 ; EG-DAG: BFE_INT
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244 ; EG-DAG: BFE_INT
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245 ; EG-DAG: BFE_INT
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246 ; EG-DAG: BFE_INT
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121
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247 define amdgpu_kernel void @local_sextload_v4i16_to_v4i32(<4 x i32> addrspace(3)* %out, <4 x i16> addrspace(3)* %in) #0 {
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120
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248 %load = load <4 x i16>, <4 x i16> addrspace(3)* %in
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249 %ext = sext <4 x i16> %load to <4 x i32>
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250 store <4 x i32> %ext, <4 x i32> addrspace(3)* %out
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251 ret void
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252 }
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253
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254 ; FUNC-LABEL: {{^}}local_zextload_v8i16_to_v8i32:
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255 ; GCN: ds_read2_b64 v{{\[[0-9]+:[0-9]+\]}}, v{{[0-9]+}} offset1:1{{$}}
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256
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257 ; EG: LDS_READ_RET
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258 ; EG: LDS_READ_RET
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259 ; EG: LDS_READ_RET
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260 ; EG: LDS_READ_RET
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121
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261 define amdgpu_kernel void @local_zextload_v8i16_to_v8i32(<8 x i32> addrspace(3)* %out, <8 x i16> addrspace(3)* %in) #0 {
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120
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262 %load = load <8 x i16>, <8 x i16> addrspace(3)* %in
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263 %ext = zext <8 x i16> %load to <8 x i32>
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264 store <8 x i32> %ext, <8 x i32> addrspace(3)* %out
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265 ret void
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266 }
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267
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268 ; FUNC-LABEL: {{^}}local_sextload_v8i16_to_v8i32:
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269 ; GCN: ds_read2_b64 v{{\[[0-9]+:[0-9]+\]}}, v{{[0-9]+}} offset1:1{{$}}
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270
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271 ; EG: LDS_READ_RET
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272 ; EG: LDS_READ_RET
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273 ; EG: LDS_READ_RET
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274 ; EG: LDS_READ_RET
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275 ; EG-DAG: BFE_INT
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276 ; EG-DAG: BFE_INT
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277 ; EG-DAG: BFE_INT
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278 ; EG-DAG: BFE_INT
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279 ; EG-DAG: BFE_INT
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280 ; EG-DAG: BFE_INT
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281 ; EG-DAG: BFE_INT
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282 ; EG-DAG: BFE_INT
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121
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283 define amdgpu_kernel void @local_sextload_v8i16_to_v8i32(<8 x i32> addrspace(3)* %out, <8 x i16> addrspace(3)* %in) #0 {
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120
|
284 %load = load <8 x i16>, <8 x i16> addrspace(3)* %in
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285 %ext = sext <8 x i16> %load to <8 x i32>
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286 store <8 x i32> %ext, <8 x i32> addrspace(3)* %out
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287 ret void
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288 }
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289
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290 ; FUNC-LABEL: {{^}}local_zextload_v16i16_to_v16i32:
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291 ; GCN-DAG: ds_read2_b64 v{{\[[0-9]+:[0-9]+\]}}, v{{[0-9]+}} offset1:1{{$}}
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292 ; GCN-DAG: ds_read2_b64 v{{\[[0-9]+:[0-9]+\]}}, v{{[0-9]+}} offset0:2 offset1:3{{$}}
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293
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294 ; GCN: ds_write2_b64
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295 ; GCN: ds_write2_b64
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296 ; GCN: ds_write2_b64
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297 ; GCN: ds_write2_b64
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298
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299 ; EG: LDS_READ_RET
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300 ; EG: LDS_READ_RET
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301 ; EG: LDS_READ_RET
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302 ; EG: LDS_READ_RET
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303 ; EG: LDS_READ_RET
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304 ; EG: LDS_READ_RET
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305 ; EG: LDS_READ_RET
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306 ; EG: LDS_READ_RET
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121
|
307 define amdgpu_kernel void @local_zextload_v16i16_to_v16i32(<16 x i32> addrspace(3)* %out, <16 x i16> addrspace(3)* %in) #0 {
|
|
120
|
308 %load = load <16 x i16>, <16 x i16> addrspace(3)* %in
|
|
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309 %ext = zext <16 x i16> %load to <16 x i32>
|
|
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310 store <16 x i32> %ext, <16 x i32> addrspace(3)* %out
|
|
|
311 ret void
|
|
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312 }
|
|
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313
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314 ; FUNC-LABEL: {{^}}local_sextload_v16i16_to_v16i32:
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315
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|
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316 ; GCN-DAG: ds_read2_b64 v{{\[[0-9]+:[0-9]+\]}}, v{{[0-9]+}} offset1:1{{$}}
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317 ; GCN-DAG: ds_read2_b64 v{{\[[0-9]+:[0-9]+\]}}, v{{[0-9]+}} offset0:2 offset1:3{{$}}
|
|
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318
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319 ; EG: LDS_READ_RET
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320 ; EG: LDS_READ_RET
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321 ; EG: LDS_READ_RET
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322 ; EG: LDS_READ_RET
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323 ; EG: LDS_READ_RET
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324 ; EG: LDS_READ_RET
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325 ; EG: LDS_READ_RET
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326 ; EG: LDS_READ_RET
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327 ; EG-DAG: BFE_INT
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328 ; EG-DAG: BFE_INT
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329 ; EG-DAG: BFE_INT
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330 ; EG-DAG: BFE_INT
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331 ; EG-DAG: BFE_INT
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332 ; EG-DAG: BFE_INT
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333 ; EG-DAG: BFE_INT
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334 ; EG-DAG: BFE_INT
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335 ; EG-DAG: BFE_INT
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336 ; EG-DAG: BFE_INT
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337 ; EG-DAG: BFE_INT
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338 ; EG-DAG: BFE_INT
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339 ; EG-DAG: BFE_INT
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340 ; EG-DAG: BFE_INT
|
|
|
341 ; EG-DAG: BFE_INT
|
|
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342 ; EG-DAG: BFE_INT
|
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121
|
343 define amdgpu_kernel void @local_sextload_v16i16_to_v16i32(<16 x i32> addrspace(3)* %out, <16 x i16> addrspace(3)* %in) #0 {
|
|
120
|
344 %load = load <16 x i16>, <16 x i16> addrspace(3)* %in
|
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345 %ext = sext <16 x i16> %load to <16 x i32>
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|
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346 store <16 x i32> %ext, <16 x i32> addrspace(3)* %out
|
|
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347 ret void
|
|
|
348 }
|
|
|
349
|
|
|
350 ; FUNC-LABEL: {{^}}local_zextload_v32i16_to_v32i32:
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|
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351 ; GCN-DAG: ds_read2_b64 v{{\[[0-9]+:[0-9]+\]}}, v{{[0-9]+}} offset1:1{{$}}
|
|
|
352 ; GCN-DAG: ds_read2_b64 v{{\[[0-9]+:[0-9]+\]}}, v{{[0-9]+}} offset0:2 offset1:3
|
|
|
353 ; GCN-DAG: ds_read2_b64 v{{\[[0-9]+:[0-9]+\]}}, v{{[0-9]+}} offset0:4 offset1:5
|
|
|
354 ; GCN-DAG: ds_read2_b64 v{{\[[0-9]+:[0-9]+\]}}, v{{[0-9]+}} offset0:6 offset1:7
|
|
|
355
|
|
|
356 ; EG: LDS_READ_RET
|
|
|
357 ; EG: LDS_READ_RET
|
|
|
358 ; EG: LDS_READ_RET
|
|
|
359 ; EG: LDS_READ_RET
|
|
|
360 ; EG: LDS_READ_RET
|
|
|
361 ; EG: LDS_READ_RET
|
|
|
362 ; EG: LDS_READ_RET
|
|
|
363 ; EG: LDS_READ_RET
|
|
|
364 ; EG: LDS_READ_RET
|
|
|
365 ; EG: LDS_READ_RET
|
|
|
366 ; EG: LDS_READ_RET
|
|
|
367 ; EG: LDS_READ_RET
|
|
|
368 ; EG: LDS_READ_RET
|
|
|
369 ; EG: LDS_READ_RET
|
|
|
370 ; EG: LDS_READ_RET
|
|
|
371 ; EG: LDS_READ_RET
|
|
121
|
372 define amdgpu_kernel void @local_zextload_v32i16_to_v32i32(<32 x i32> addrspace(3)* %out, <32 x i16> addrspace(3)* %in) #0 {
|
|
120
|
373 %load = load <32 x i16>, <32 x i16> addrspace(3)* %in
|
|
|
374 %ext = zext <32 x i16> %load to <32 x i32>
|
|
|
375 store <32 x i32> %ext, <32 x i32> addrspace(3)* %out
|
|
|
376 ret void
|
|
|
377 }
|
|
|
378
|
|
|
379 ; FUNC-LABEL: {{^}}local_sextload_v32i16_to_v32i32:
|
|
|
380 ; GCN-DAG: ds_read2_b64 v{{\[[0-9]+:[0-9]+\]}}, v{{[0-9]+}} offset0:2 offset1:3{{$}}
|
|
|
381 ; GCN-DAG: ds_read2_b64 v{{\[[0-9]+:[0-9]+\]}}, v{{[0-9]+}} offset0:4 offset1:5
|
|
|
382 ; GCN-DAG: ds_read2_b64 v{{\[[0-9]+:[0-9]+\]}}, v{{[0-9]+}} offset1:1{{$}}
|
|
|
383 ; GCN-DAG: ds_read2_b64 v{{\[[0-9]+:[0-9]+\]}}, v{{[0-9]+}} offset0:6 offset1:7
|
|
|
384 ; GCN-DAG: ds_write2_b64 v{{[0-9]+}}, v{{\[[0-9]+:[0-9]+\]}}, v{{\[[0-9]+:[0-9]+\]}} offset0:14 offset1:15
|
|
|
385 ; GCN-DAG: ds_write2_b64 v{{[0-9]+}}, v{{\[[0-9]+:[0-9]+\]}}, v{{\[[0-9]+:[0-9]+\]}} offset0:12 offset1:13
|
|
|
386 ; GCN-DAG: ds_write2_b64 v{{[0-9]+}}, v{{\[[0-9]+:[0-9]+\]}}, v{{\[[0-9]+:[0-9]+\]}} offset0:10 offset1:11
|
|
|
387 ; GCN-DAG: ds_write2_b64 v{{[0-9]+}}, v{{\[[0-9]+:[0-9]+\]}}, v{{\[[0-9]+:[0-9]+\]}} offset0:8 offset1:9
|
|
|
388 ; GCN-DAG: ds_write2_b64 v{{[0-9]+}}, v{{\[[0-9]+:[0-9]+\]}}, v{{\[[0-9]+:[0-9]+\]}} offset0:6 offset1:7
|
|
|
389 ; GCN-DAG: ds_write2_b64 v{{[0-9]+}}, v{{\[[0-9]+:[0-9]+\]}}, v{{\[[0-9]+:[0-9]+\]}} offset0:4 offset1:5
|
|
|
390 ; GCN-DAG: ds_write2_b64 v{{[0-9]+}}, v{{\[[0-9]+:[0-9]+\]}}, v{{\[[0-9]+:[0-9]+\]}} offset0:2 offset1:3
|
|
|
391 ; GCN-DAG: ds_write2_b64 v{{[0-9]+}}, v{{\[[0-9]+:[0-9]+\]}}, v{{\[[0-9]+:[0-9]+\]}} offset1:1
|
|
|
392
|
|
|
393 ; EG: LDS_READ_RET
|
|
|
394 ; EG: LDS_READ_RET
|
|
|
395 ; EG: LDS_READ_RET
|
|
|
396 ; EG: LDS_READ_RET
|
|
|
397 ; EG: LDS_READ_RET
|
|
|
398 ; EG: LDS_READ_RET
|
|
|
399 ; EG: LDS_READ_RET
|
|
|
400 ; EG: LDS_READ_RET
|
|
|
401 ; EG: LDS_READ_RET
|
|
|
402 ; EG: LDS_READ_RET
|
|
|
403 ; EG: LDS_READ_RET
|
|
|
404 ; EG: LDS_READ_RET
|
|
|
405 ; EG: LDS_READ_RET
|
|
|
406 ; EG: LDS_READ_RET
|
|
|
407 ; EG: LDS_READ_RET
|
|
|
408 ; EG: LDS_READ_RET
|
|
121
|
409 define amdgpu_kernel void @local_sextload_v32i16_to_v32i32(<32 x i32> addrspace(3)* %out, <32 x i16> addrspace(3)* %in) #0 {
|
|
120
|
410 %load = load <32 x i16>, <32 x i16> addrspace(3)* %in
|
|
|
411 %ext = sext <32 x i16> %load to <32 x i32>
|
|
|
412 store <32 x i32> %ext, <32 x i32> addrspace(3)* %out
|
|
|
413 ret void
|
|
|
414 }
|
|
|
415
|
|
|
416 ; FUNC-LABEL: {{^}}local_zextload_v64i16_to_v64i32:
|
|
|
417 ; GCN-DAG: ds_read2_b64 v{{\[[0-9]+:[0-9]+\]}}, v{{[0-9]+}} offset0:14 offset1:15
|
|
|
418 ; GCN-DAG: ds_read2_b64 v{{\[[0-9]+:[0-9]+\]}}, v{{[0-9]+}} offset1:1{{$}}
|
|
|
419 ; GCN-DAG: ds_read2_b64 v{{\[[0-9]+:[0-9]+\]}}, v{{[0-9]+}} offset0:2 offset1:3
|
|
|
420 ; GCN-DAG: ds_read2_b64 v{{\[[0-9]+:[0-9]+\]}}, v{{[0-9]+}} offset0:4 offset1:5
|
|
|
421 ; GCN-DAG: ds_read2_b64 v{{\[[0-9]+:[0-9]+\]}}, v{{[0-9]+}} offset0:6 offset1:7
|
|
|
422 ; GCN-DAG: ds_read2_b64 v{{\[[0-9]+:[0-9]+\]}}, v{{[0-9]+}} offset0:8 offset1:9
|
|
|
423 ; GCN-DAG: ds_read2_b64 v{{\[[0-9]+:[0-9]+\]}}, v{{[0-9]+}} offset0:12 offset1:13
|
|
|
424 ; GCN-DAG: ds_read2_b64 v{{\[[0-9]+:[0-9]+\]}}, v{{[0-9]+}} offset0:10 offset1:11
|
|
|
425 ; GCN-DAG: ds_write2_b64 v{{[0-9]+}}, v{{\[[0-9]+:[0-9]+\]}}, v{{\[[0-9]+:[0-9]+\]}} offset0:30 offset1:31
|
|
|
426 ; GCN-DAG: ds_write2_b64 v{{[0-9]+}}, v{{\[[0-9]+:[0-9]+\]}}, v{{\[[0-9]+:[0-9]+\]}} offset0:28 offset1:29
|
|
|
427 ; GCN-DAG: ds_write2_b64 v{{[0-9]+}}, v{{\[[0-9]+:[0-9]+\]}}, v{{\[[0-9]+:[0-9]+\]}} offset0:26 offset1:27
|
|
|
428 ; GCN-DAG: ds_write2_b64 v{{[0-9]+}}, v{{\[[0-9]+:[0-9]+\]}}, v{{\[[0-9]+:[0-9]+\]}} offset0:24 offset1:25
|
|
|
429 ; GCN-DAG: ds_write2_b64 v{{[0-9]+}}, v{{\[[0-9]+:[0-9]+\]}}, v{{\[[0-9]+:[0-9]+\]}} offset0:22 offset1:23
|
|
|
430 ; GCN-DAG: ds_write2_b64 v{{[0-9]+}}, v{{\[[0-9]+:[0-9]+\]}}, v{{\[[0-9]+:[0-9]+\]}} offset0:20 offset1:21
|
|
|
431 ; GCN-DAG: ds_write2_b64 v{{[0-9]+}}, v{{\[[0-9]+:[0-9]+\]}}, v{{\[[0-9]+:[0-9]+\]}} offset0:18 offset1:19
|
|
|
432 ; GCN-DAG: ds_write2_b64 v{{[0-9]+}}, v{{\[[0-9]+:[0-9]+\]}}, v{{\[[0-9]+:[0-9]+\]}} offset0:16 offset1:17
|
|
|
433 ; GCN-DAG: ds_write2_b64 v{{[0-9]+}}, v{{\[[0-9]+:[0-9]+\]}}, v{{\[[0-9]+:[0-9]+\]}} offset0:14 offset1:15
|
|
|
434 ; GCN-DAG: ds_write2_b64 v{{[0-9]+}}, v{{\[[0-9]+:[0-9]+\]}}, v{{\[[0-9]+:[0-9]+\]}} offset0:12 offset1:13
|
|
|
435 ; GCN-DAG: ds_write2_b64 v{{[0-9]+}}, v{{\[[0-9]+:[0-9]+\]}}, v{{\[[0-9]+:[0-9]+\]}} offset0:10 offset1:11
|
|
|
436 ; GCN-DAG: ds_write2_b64 v{{[0-9]+}}, v{{\[[0-9]+:[0-9]+\]}}, v{{\[[0-9]+:[0-9]+\]}} offset0:8 offset1:9
|
|
|
437 ; GCN-DAG: ds_write2_b64 v{{[0-9]+}}, v{{\[[0-9]+:[0-9]+\]}}, v{{\[[0-9]+:[0-9]+\]}} offset0:6 offset1:7
|
|
|
438 ; GCN-DAG: ds_write2_b64 v{{[0-9]+}}, v{{\[[0-9]+:[0-9]+\]}}, v{{\[[0-9]+:[0-9]+\]}} offset0:4 offset1:5
|
|
|
439 ; GCN-DAG: ds_write2_b64 v{{[0-9]+}}, v{{\[[0-9]+:[0-9]+\]}}, v{{\[[0-9]+:[0-9]+\]}} offset0:2 offset1:3
|
|
|
440 ; GCN-DAG: ds_write2_b64 v{{[0-9]+}}, v{{\[[0-9]+:[0-9]+\]}}, v{{\[[0-9]+:[0-9]+\]}} offset1:1
|
|
|
441
|
|
|
442 ; EG: LDS_READ_RET
|
|
|
443 ; EG: LDS_READ_RET
|
|
|
444 ; EG: LDS_READ_RET
|
|
|
445 ; EG: LDS_READ_RET
|
|
|
446 ; EG: LDS_READ_RET
|
|
|
447 ; EG: LDS_READ_RET
|
|
|
448 ; EG: LDS_READ_RET
|
|
|
449 ; EG: LDS_READ_RET
|
|
|
450 ; EG: LDS_READ_RET
|
|
|
451 ; EG: LDS_READ_RET
|
|
|
452 ; EG: LDS_READ_RET
|
|
|
453 ; EG: LDS_READ_RET
|
|
|
454 ; EG: LDS_READ_RET
|
|
|
455 ; EG: LDS_READ_RET
|
|
|
456 ; EG: LDS_READ_RET
|
|
|
457 ; EG: LDS_READ_RET
|
|
|
458 ; EG: LDS_READ_RET
|
|
|
459 ; EG: LDS_READ_RET
|
|
|
460 ; EG: LDS_READ_RET
|
|
|
461 ; EG: LDS_READ_RET
|
|
|
462 ; EG: LDS_READ_RET
|
|
|
463 ; EG: LDS_READ_RET
|
|
|
464 ; EG: LDS_READ_RET
|
|
|
465 ; EG: LDS_READ_RET
|
|
|
466 ; EG: LDS_READ_RET
|
|
|
467 ; EG: LDS_READ_RET
|
|
|
468 ; EG: LDS_READ_RET
|
|
|
469 ; EG: LDS_READ_RET
|
|
|
470 ; EG: LDS_READ_RET
|
|
|
471 ; EG: LDS_READ_RET
|
|
|
472 ; EG: LDS_READ_RET
|
|
|
473 ; EG: LDS_READ_RET
|
|
121
|
474 define amdgpu_kernel void @local_zextload_v64i16_to_v64i32(<64 x i32> addrspace(3)* %out, <64 x i16> addrspace(3)* %in) #0 {
|
|
120
|
475 %load = load <64 x i16>, <64 x i16> addrspace(3)* %in
|
|
|
476 %ext = zext <64 x i16> %load to <64 x i32>
|
|
|
477 store <64 x i32> %ext, <64 x i32> addrspace(3)* %out
|
|
|
478 ret void
|
|
|
479 }
|
|
|
480
|
|
|
481 ; FUNC-LABEL: {{^}}local_sextload_v64i16_to_v64i32:
|
|
|
482
|
|
|
483 ; EG: LDS_READ_RET
|
|
|
484 ; EG: LDS_READ_RET
|
|
|
485 ; EG: LDS_READ_RET
|
|
|
486 ; EG: LDS_READ_RET
|
|
|
487 ; EG: LDS_READ_RET
|
|
|
488 ; EG: LDS_READ_RET
|
|
|
489 ; EG: LDS_READ_RET
|
|
|
490 ; EG: LDS_READ_RET
|
|
|
491 ; EG: LDS_READ_RET
|
|
|
492 ; EG: LDS_READ_RET
|
|
|
493 ; EG: LDS_READ_RET
|
|
|
494 ; EG: LDS_READ_RET
|
|
|
495 ; EG: LDS_READ_RET
|
|
|
496 ; EG: LDS_READ_RET
|
|
|
497 ; EG: LDS_READ_RET
|
|
|
498 ; EG: LDS_READ_RET
|
|
|
499 ; EG: LDS_READ_RET
|
|
|
500 ; EG: LDS_READ_RET
|
|
|
501 ; EG: LDS_READ_RET
|
|
|
502 ; EG: LDS_READ_RET
|
|
|
503 ; EG: LDS_READ_RET
|
|
|
504 ; EG: LDS_READ_RET
|
|
|
505 ; EG: LDS_READ_RET
|
|
|
506 ; EG: LDS_READ_RET
|
|
|
507 ; EG: LDS_READ_RET
|
|
|
508 ; EG: LDS_READ_RET
|
|
|
509 ; EG: LDS_READ_RET
|
|
|
510 ; EG: LDS_READ_RET
|
|
|
511 ; EG: LDS_READ_RET
|
|
|
512 ; EG: LDS_READ_RET
|
|
|
513 ; EG: LDS_READ_RET
|
|
|
514 ; EG: LDS_READ_RET
|
|
121
|
515 define amdgpu_kernel void @local_sextload_v64i16_to_v64i32(<64 x i32> addrspace(3)* %out, <64 x i16> addrspace(3)* %in) #0 {
|
|
120
|
516 %load = load <64 x i16>, <64 x i16> addrspace(3)* %in
|
|
|
517 %ext = sext <64 x i16> %load to <64 x i32>
|
|
|
518 store <64 x i32> %ext, <64 x i32> addrspace(3)* %out
|
|
|
519 ret void
|
|
|
520 }
|
|
|
521
|
|
|
522 ; FUNC-LABEL: {{^}}local_zextload_i16_to_i64:
|
|
|
523 ; GCN-DAG: ds_read_u16 v[[LO:[0-9]+]],
|
|
|
524 ; GCN-DAG: v_mov_b32_e32 v[[HI:[0-9]+]], 0{{$}}
|
|
|
525
|
|
|
526 ; GCN: ds_write_b64 v{{[0-9]+}}, v{{\[}}[[LO]]:[[HI]]]
|
|
|
527
|
|
|
528 ; EG: MOV {{[* ]*}}[[FROM:T[0-9]+\.[XYZW]]], KC0[2].Z
|
|
|
529 ; EG: LDS_USHORT_READ_RET {{.*}} [[FROM]]
|
|
|
530 ; EG-DAG: MOV {{[* ]*}}[[DATA:T[0-9]+\.[XYZW]]], OQAP
|
|
|
531 ; EG-DAG: MOV {{[* ]*}}[[TO:T[0-9]+\.[XYZW]]], KC0[2].Y
|
|
|
532 ; EG-DAG: LDS_WRITE
|
|
121
|
533 define amdgpu_kernel void @local_zextload_i16_to_i64(i64 addrspace(3)* %out, i16 addrspace(3)* %in) #0 {
|
|
120
|
534 %a = load i16, i16 addrspace(3)* %in
|
|
|
535 %ext = zext i16 %a to i64
|
|
|
536 store i64 %ext, i64 addrspace(3)* %out
|
|
|
537 ret void
|
|
|
538 }
|
|
|
539
|
|
|
540 ; FUNC-LABEL: {{^}}local_sextload_i16_to_i64:
|
|
|
541 ; FIXME: Need to optimize this sequence to avoid an extra shift.
|
|
|
542 ; t25: i32,ch = load<LD2[%in(addrspace=3)], anyext from i16> t12, t10, undef:i32
|
|
|
543 ; t28: i64 = any_extend t25
|
|
|
544 ; t30: i64 = sign_extend_inreg t28, ValueType:ch:i16
|
|
|
545 ; SI: ds_read_i16 v[[LO:[0-9]+]],
|
|
|
546 ; VI: ds_read_u16 v[[ULO:[0-9]+]]
|
|
|
547 ; VI: v_bfe_i32 v[[LO:[0-9]+]], v[[ULO]], 0, 16
|
|
|
548 ; GCN-DAG: v_ashrrev_i32_e32 v[[HI:[0-9]+]], 31, v[[LO]]
|
|
|
549
|
|
|
550 ; GCN: ds_write_b64 v{{[0-9]+}}, v{{\[}}[[LO]]:[[HI]]]
|
|
|
551
|
|
|
552 ; EG: MOV {{[* ]*}}[[FROM:T[0-9]+\.[XYZW]]], KC0[2].Z
|
|
|
553 ; EG: LDS_USHORT_READ_RET {{.*}} [[FROM]]
|
|
|
554 ; EG-DAG: MOV {{[* ]*}}[[TMP:T[0-9]+\.[XYZW]]], OQAP
|
|
|
555 ; EG-DAG: MOV {{[* ]*}}[[TO:T[0-9]+\.[XYZW]]], KC0[2].Y
|
|
|
556 ; EG-DAG: BFE_INT {{[* ]*}}[[DATA:T[0-9]+\.[XYZW]]], {{.*}}, 0.0, literal
|
|
|
557 ; EG-DAG: LDS_WRITE
|
|
|
558 ; EG-DAG: 16
|
|
|
559 ; EG: LDS_WRITE {{\*?}} [[TO]], [[DATA]]
|
|
121
|
560 define amdgpu_kernel void @local_sextload_i16_to_i64(i64 addrspace(3)* %out, i16 addrspace(3)* %in) #0 {
|
|
120
|
561 %a = load i16, i16 addrspace(3)* %in
|
|
|
562 %ext = sext i16 %a to i64
|
|
|
563 store i64 %ext, i64 addrspace(3)* %out
|
|
|
564 ret void
|
|
|
565 }
|
|
|
566
|
|
|
567 ; FUNC-LABEL: {{^}}local_zextload_v1i16_to_v1i64:
|
|
|
568
|
|
|
569 ; EG: MOV {{[* ]*}}[[FROM:T[0-9]+\.[XYZW]]], KC0[2].Z
|
|
|
570 ; EG: LDS_USHORT_READ_RET {{.*}} [[FROM]]
|
|
|
571 ; EG-DAG: MOV {{[* ]*}}[[DATA:T[0-9]+\.[XYZW]]], OQAP
|
|
|
572 ; EG-DAG: MOV {{[* ]*}}[[TO:T[0-9]+\.[XYZW]]], KC0[2].Y
|
|
|
573 ; EG-DAG: LDS_WRITE
|
|
121
|
574 define amdgpu_kernel void @local_zextload_v1i16_to_v1i64(<1 x i64> addrspace(3)* %out, <1 x i16> addrspace(3)* %in) #0 {
|
|
120
|
575 %load = load <1 x i16>, <1 x i16> addrspace(3)* %in
|
|
|
576 %ext = zext <1 x i16> %load to <1 x i64>
|
|
|
577 store <1 x i64> %ext, <1 x i64> addrspace(3)* %out
|
|
|
578 ret void
|
|
|
579 }
|
|
|
580
|
|
|
581 ; FUNC-LABEL: {{^}}local_sextload_v1i16_to_v1i64:
|
|
|
582
|
|
|
583 ; EG: MOV {{[* ]*}}[[FROM:T[0-9]+\.[XYZW]]], KC0[2].Z
|
|
|
584 ; EG: LDS_USHORT_READ_RET {{.*}} [[FROM]]
|
|
|
585 ; EG-DAG: MOV {{[* ]*}}[[TMP:T[0-9]+\.[XYZW]]], OQAP
|
|
|
586 ; EG-DAG: MOV {{[* ]*}}[[TO:T[0-9]+\.[XYZW]]], KC0[2].Y
|
|
|
587 ; EG-DAG: BFE_INT {{[* ]*}}[[DATA:T[0-9]+\.[XYZW]]], {{.*}}, 0.0, literal
|
|
|
588 ; EG-DAG: LDS_WRITE
|
|
|
589 ; EG-DAG: 16
|
|
|
590 ; EG: LDS_WRITE {{\*?}} [[TO]], [[DATA]]
|
|
121
|
591 define amdgpu_kernel void @local_sextload_v1i16_to_v1i64(<1 x i64> addrspace(3)* %out, <1 x i16> addrspace(3)* %in) #0 {
|
|
120
|
592 %load = load <1 x i16>, <1 x i16> addrspace(3)* %in
|
|
|
593 %ext = sext <1 x i16> %load to <1 x i64>
|
|
|
594 store <1 x i64> %ext, <1 x i64> addrspace(3)* %out
|
|
|
595 ret void
|
|
|
596 }
|
|
|
597
|
|
|
598 ; FUNC-LABEL: {{^}}local_zextload_v2i16_to_v2i64:
|
|
|
599
|
|
|
600 ; EG: LDS_READ_RET
|
|
121
|
601 define amdgpu_kernel void @local_zextload_v2i16_to_v2i64(<2 x i64> addrspace(3)* %out, <2 x i16> addrspace(3)* %in) #0 {
|
|
120
|
602 %load = load <2 x i16>, <2 x i16> addrspace(3)* %in
|
|
|
603 %ext = zext <2 x i16> %load to <2 x i64>
|
|
|
604 store <2 x i64> %ext, <2 x i64> addrspace(3)* %out
|
|
|
605 ret void
|
|
|
606 }
|
|
|
607
|
|
|
608 ; FUNC-LABEL: {{^}}local_sextload_v2i16_to_v2i64:
|
|
|
609
|
|
|
610 ; EG: LDS_READ_RET
|
|
|
611 ; EG-DAG: BFE_INT
|
|
|
612 ; EG-DAG: ASHR
|
|
121
|
613 define amdgpu_kernel void @local_sextload_v2i16_to_v2i64(<2 x i64> addrspace(3)* %out, <2 x i16> addrspace(3)* %in) #0 {
|
|
120
|
614 %load = load <2 x i16>, <2 x i16> addrspace(3)* %in
|
|
|
615 %ext = sext <2 x i16> %load to <2 x i64>
|
|
|
616 store <2 x i64> %ext, <2 x i64> addrspace(3)* %out
|
|
|
617 ret void
|
|
|
618 }
|
|
|
619
|
|
|
620 ; FUNC-LABEL: {{^}}local_zextload_v4i16_to_v4i64:
|
|
|
621
|
|
|
622 ; EG: LDS_READ_RET
|
|
|
623 ; EG: LDS_READ_RET
|
|
121
|
624 define amdgpu_kernel void @local_zextload_v4i16_to_v4i64(<4 x i64> addrspace(3)* %out, <4 x i16> addrspace(3)* %in) #0 {
|
|
120
|
625 %load = load <4 x i16>, <4 x i16> addrspace(3)* %in
|
|
|
626 %ext = zext <4 x i16> %load to <4 x i64>
|
|
|
627 store <4 x i64> %ext, <4 x i64> addrspace(3)* %out
|
|
|
628 ret void
|
|
|
629 }
|
|
|
630
|
|
|
631 ; FUNC-LABEL: {{^}}local_sextload_v4i16_to_v4i64:
|
|
|
632
|
|
|
633 ; EG: LDS_READ_RET
|
|
|
634 ; EG: LDS_READ_RET
|
|
|
635 ; EG-DAG: BFE_INT
|
|
|
636 ; EG-DAG: BFE_INT
|
|
|
637 ; EG-DAG: ASHR
|
|
|
638 ; EG-DAG: ASHR
|
|
121
|
639 define amdgpu_kernel void @local_sextload_v4i16_to_v4i64(<4 x i64> addrspace(3)* %out, <4 x i16> addrspace(3)* %in) #0 {
|
|
120
|
640 %load = load <4 x i16>, <4 x i16> addrspace(3)* %in
|
|
|
641 %ext = sext <4 x i16> %load to <4 x i64>
|
|
|
642 store <4 x i64> %ext, <4 x i64> addrspace(3)* %out
|
|
|
643 ret void
|
|
|
644 }
|
|
|
645
|
|
|
646 ; FUNC-LABEL: {{^}}local_zextload_v8i16_to_v8i64:
|
|
|
647
|
|
|
648 ; EG: LDS_READ_RET
|
|
|
649 ; EG: LDS_READ_RET
|
|
|
650 ; EG: LDS_READ_RET
|
|
|
651 ; EG: LDS_READ_RET
|
|
121
|
652 define amdgpu_kernel void @local_zextload_v8i16_to_v8i64(<8 x i64> addrspace(3)* %out, <8 x i16> addrspace(3)* %in) #0 {
|
|
120
|
653 %load = load <8 x i16>, <8 x i16> addrspace(3)* %in
|
|
|
654 %ext = zext <8 x i16> %load to <8 x i64>
|
|
|
655 store <8 x i64> %ext, <8 x i64> addrspace(3)* %out
|
|
|
656 ret void
|
|
|
657 }
|
|
|
658
|
|
|
659 ; FUNC-LABEL: {{^}}local_sextload_v8i16_to_v8i64:
|
|
|
660
|
|
|
661 ; EG: LDS_READ_RET
|
|
|
662 ; EG: LDS_READ_RET
|
|
|
663 ; EG: LDS_READ_RET
|
|
|
664 ; EG: LDS_READ_RET
|
|
|
665 ; EG-DAG: BFE_INT
|
|
|
666 ; EG-DAG: BFE_INT
|
|
|
667 ; EG-DAG: ASHR
|
|
|
668 ; EG-DAG: ASHR
|
|
|
669 ; EG-DAG: BFE_INT
|
|
|
670 ; EG-DAG: BFE_INT
|
|
|
671 ; EG-DAG: ASHR
|
|
|
672 ; EG-DAG: ASHR
|
|
121
|
673 define amdgpu_kernel void @local_sextload_v8i16_to_v8i64(<8 x i64> addrspace(3)* %out, <8 x i16> addrspace(3)* %in) #0 {
|
|
120
|
674 %load = load <8 x i16>, <8 x i16> addrspace(3)* %in
|
|
|
675 %ext = sext <8 x i16> %load to <8 x i64>
|
|
|
676 store <8 x i64> %ext, <8 x i64> addrspace(3)* %out
|
|
|
677 ret void
|
|
|
678 }
|
|
|
679
|
|
|
680 ; FUNC-LABEL: {{^}}local_zextload_v16i16_to_v16i64:
|
|
|
681
|
|
|
682 ; EG: LDS_READ_RET
|
|
|
683 ; EG: LDS_READ_RET
|
|
|
684 ; EG: LDS_READ_RET
|
|
|
685 ; EG: LDS_READ_RET
|
|
|
686 ; EG: LDS_READ_RET
|
|
|
687 ; EG: LDS_READ_RET
|
|
|
688 ; EG: LDS_READ_RET
|
|
|
689 ; EG: LDS_READ_RET
|
|
121
|
690 define amdgpu_kernel void @local_zextload_v16i16_to_v16i64(<16 x i64> addrspace(3)* %out, <16 x i16> addrspace(3)* %in) #0 {
|
|
120
|
691 %load = load <16 x i16>, <16 x i16> addrspace(3)* %in
|
|
|
692 %ext = zext <16 x i16> %load to <16 x i64>
|
|
|
693 store <16 x i64> %ext, <16 x i64> addrspace(3)* %out
|
|
|
694 ret void
|
|
|
695 }
|
|
|
696
|
|
|
697 ; FUNC-LABEL: {{^}}local_sextload_v16i16_to_v16i64:
|
|
|
698
|
|
|
699 ; EG: LDS_READ_RET
|
|
|
700 ; EG: LDS_READ_RET
|
|
|
701 ; EG: LDS_READ_RET
|
|
|
702 ; EG: LDS_READ_RET
|
|
|
703 ; EG: LDS_READ_RET
|
|
|
704 ; EG: LDS_READ_RET
|
|
|
705 ; EG: LDS_READ_RET
|
|
|
706 ; EG: LDS_READ_RET
|
|
|
707 ; EG-DAG: BFE_INT
|
|
|
708 ; EG-DAG: BFE_INT
|
|
|
709 ; EG-DAG: ASHR
|
|
|
710 ; EG-DAG: ASHR
|
|
|
711 ; EG-DAG: BFE_INT
|
|
|
712 ; EG-DAG: BFE_INT
|
|
|
713 ; EG-DAG: ASHR
|
|
|
714 ; EG-DAG: ASHR
|
|
|
715 ; EG-DAG: BFE_INT
|
|
|
716 ; EG-DAG: BFE_INT
|
|
|
717 ; EG-DAG: ASHR
|
|
|
718 ; EG-DAG: ASHR
|
|
|
719 ; EG-DAG: BFE_INT
|
|
|
720 ; EG-DAG: BFE_INT
|
|
|
721 ; EG-DAG: ASHR
|
|
|
722 ; EG-DAG: ASHR
|
|
121
|
723 define amdgpu_kernel void @local_sextload_v16i16_to_v16i64(<16 x i64> addrspace(3)* %out, <16 x i16> addrspace(3)* %in) #0 {
|
|
120
|
724 %load = load <16 x i16>, <16 x i16> addrspace(3)* %in
|
|
|
725 %ext = sext <16 x i16> %load to <16 x i64>
|
|
|
726 store <16 x i64> %ext, <16 x i64> addrspace(3)* %out
|
|
|
727 ret void
|
|
|
728 }
|
|
|
729
|
|
|
730 ; FUNC-LABEL: {{^}}local_zextload_v32i16_to_v32i64:
|
|
|
731
|
|
|
732 ; EG: LDS_READ_RET
|
|
|
733 ; EG: LDS_READ_RET
|
|
|
734 ; EG: LDS_READ_RET
|
|
|
735 ; EG: LDS_READ_RET
|
|
|
736 ; EG: LDS_READ_RET
|
|
|
737 ; EG: LDS_READ_RET
|
|
|
738 ; EG: LDS_READ_RET
|
|
|
739 ; EG: LDS_READ_RET
|
|
|
740 ; EG: LDS_READ_RET
|
|
|
741 ; EG: LDS_READ_RET
|
|
|
742 ; EG: LDS_READ_RET
|
|
|
743 ; EG: LDS_READ_RET
|
|
|
744 ; EG: LDS_READ_RET
|
|
|
745 ; EG: LDS_READ_RET
|
|
|
746 ; EG: LDS_READ_RET
|
|
|
747 ; EG: LDS_READ_RET
|
|
121
|
748 define amdgpu_kernel void @local_zextload_v32i16_to_v32i64(<32 x i64> addrspace(3)* %out, <32 x i16> addrspace(3)* %in) #0 {
|
|
120
|
749 %load = load <32 x i16>, <32 x i16> addrspace(3)* %in
|
|
|
750 %ext = zext <32 x i16> %load to <32 x i64>
|
|
|
751 store <32 x i64> %ext, <32 x i64> addrspace(3)* %out
|
|
|
752 ret void
|
|
|
753 }
|
|
|
754
|
|
|
755 ; FUNC-LABEL: {{^}}local_sextload_v32i16_to_v32i64:
|
|
|
756
|
|
|
757 ; EG: LDS_READ_RET
|
|
|
758 ; EG: LDS_READ_RET
|
|
|
759 ; EG: LDS_READ_RET
|
|
|
760 ; EG: LDS_READ_RET
|
|
|
761 ; EG: LDS_READ_RET
|
|
|
762 ; EG: LDS_READ_RET
|
|
|
763 ; EG: LDS_READ_RET
|
|
|
764 ; EG: LDS_READ_RET
|
|
|
765 ; EG: LDS_READ_RET
|
|
|
766 ; EG: LDS_READ_RET
|
|
|
767 ; EG: LDS_READ_RET
|
|
|
768 ; EG: LDS_READ_RET
|
|
|
769 ; EG: LDS_READ_RET
|
|
|
770 ; EG: LDS_READ_RET
|
|
|
771 ; EG: LDS_READ_RET
|
|
|
772 ; EG: LDS_READ_RET
|
|
|
773 ; EG-DAG: BFE_INT
|
|
|
774 ; EG-DAG: BFE_INT
|
|
|
775 ; EG-DAG: ASHR
|
|
|
776 ; EG-DAG: ASHR
|
|
|
777 ; EG-DAG: BFE_INT
|
|
|
778 ; EG-DAG: BFE_INT
|
|
|
779 ; EG-DAG: ASHR
|
|
|
780 ; EG-DAG: ASHR
|
|
|
781 ; EG-DAG: BFE_INT
|
|
|
782 ; EG-DAG: BFE_INT
|
|
|
783 ; EG-DAG: ASHR
|
|
|
784 ; EG-DAG: ASHR
|
|
|
785 ; EG-DAG: BFE_INT
|
|
|
786 ; EG-DAG: BFE_INT
|
|
|
787 ; EG-DAG: ASHR
|
|
|
788 ; EG-DAG: ASHR
|
|
|
789 ; EG-DAG: BFE_INT
|
|
|
790 ; EG-DAG: BFE_INT
|
|
|
791 ; EG-DAG: ASHR
|
|
|
792 ; EG-DAG: ASHR
|
|
|
793 ; EG-DAG: BFE_INT
|
|
|
794 ; EG-DAG: BFE_INT
|
|
|
795 ; EG-DAG: ASHR
|
|
|
796 ; EG-DAG: ASHR
|
|
|
797 ; EG-DAG: BFE_INT
|
|
|
798 ; EG-DAG: BFE_INT
|
|
|
799 ; EG-DAG: ASHR
|
|
|
800 ; EG-DAG: ASHR
|
|
|
801 ; EG-DAG: BFE_INT
|
|
|
802 ; EG-DAG: BFE_INT
|
|
|
803 ; EG-DAG: ASHR
|
|
|
804 ; EG-DAG: ASHR
|
|
121
|
805 define amdgpu_kernel void @local_sextload_v32i16_to_v32i64(<32 x i64> addrspace(3)* %out, <32 x i16> addrspace(3)* %in) #0 {
|
|
120
|
806 %load = load <32 x i16>, <32 x i16> addrspace(3)* %in
|
|
|
807 %ext = sext <32 x i16> %load to <32 x i64>
|
|
|
808 store <32 x i64> %ext, <32 x i64> addrspace(3)* %out
|
|
|
809 ret void
|
|
|
810 }
|
|
|
811
|
|
|
812 ; ; XFUNC-LABEL: {{^}}local_zextload_v64i16_to_v64i64:
|
|
121
|
813 ; define amdgpu_kernel void @local_zextload_v64i16_to_v64i64(<64 x i64> addrspace(3)* %out, <64 x i16> addrspace(3)* %in) #0 {
|
|
120
|
814 ; %load = load <64 x i16>, <64 x i16> addrspace(3)* %in
|
|
|
815 ; %ext = zext <64 x i16> %load to <64 x i64>
|
|
|
816 ; store <64 x i64> %ext, <64 x i64> addrspace(3)* %out
|
|
|
817 ; ret void
|
|
|
818 ; }
|
|
|
819
|
|
|
820 ; ; XFUNC-LABEL: {{^}}local_sextload_v64i16_to_v64i64:
|
|
121
|
821 ; define amdgpu_kernel void @local_sextload_v64i16_to_v64i64(<64 x i64> addrspace(3)* %out, <64 x i16> addrspace(3)* %in) #0 {
|
|
120
|
822 ; %load = load <64 x i16>, <64 x i16> addrspace(3)* %in
|
|
|
823 ; %ext = sext <64 x i16> %load to <64 x i64>
|
|
|
824 ; store <64 x i64> %ext, <64 x i64> addrspace(3)* %out
|
|
|
825 ; ret void
|
|
|
826 ; }
|
|
|
827
|
|
|
828 attributes #0 = { nounwind }
|
