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120
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1 ; RUN: llc -march=r600 -mcpu=redwood < %s | FileCheck %s -check-prefix=R600 -check-prefix=FUNC
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2 ; RUN: opt -S -mtriple=r600-unknown-unknown -mcpu=redwood -amdgpu-promote-alloca < %s | FileCheck -check-prefix=OPT %s
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3
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4 declare i32 @llvm.r600.read.tidig.x() nounwind readnone
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5
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6 ; FUNC-LABEL: {{^}}mova_same_clause:
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7
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8 ; R600: LDS_WRITE
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9 ; R600: LDS_WRITE
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10 ; R600: LDS_READ
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11 ; R600: LDS_READ
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12
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13 ; OPT: call i32 @llvm.r600.read.local.size.y(), !range !0
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14 ; OPT: call i32 @llvm.r600.read.local.size.z(), !range !0
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121
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15 ; OPT: call i32 @llvm.r600.read.tidig.x(), !range !1
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16 ; OPT: call i32 @llvm.r600.read.tidig.y(), !range !1
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17 ; OPT: call i32 @llvm.r600.read.tidig.z(), !range !1
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120
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18
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121
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19 define amdgpu_kernel void @mova_same_clause(i32 addrspace(1)* nocapture %out, i32 addrspace(1)* nocapture %in) #0 {
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120
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20 entry:
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21 %stack = alloca [5 x i32], align 4
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22 %0 = load i32, i32 addrspace(1)* %in, align 4
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23 %arrayidx1 = getelementptr inbounds [5 x i32], [5 x i32]* %stack, i32 0, i32 %0
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24 store i32 4, i32* %arrayidx1, align 4
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25 %arrayidx2 = getelementptr inbounds i32, i32 addrspace(1)* %in, i32 1
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26 %1 = load i32, i32 addrspace(1)* %arrayidx2, align 4
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27 %arrayidx3 = getelementptr inbounds [5 x i32], [5 x i32]* %stack, i32 0, i32 %1
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28 store i32 5, i32* %arrayidx3, align 4
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29 %arrayidx10 = getelementptr inbounds [5 x i32], [5 x i32]* %stack, i32 0, i32 0
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30 %2 = load i32, i32* %arrayidx10, align 4
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31 store i32 %2, i32 addrspace(1)* %out, align 4
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32 %arrayidx12 = getelementptr inbounds [5 x i32], [5 x i32]* %stack, i32 0, i32 1
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33 %3 = load i32, i32* %arrayidx12
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34 %arrayidx13 = getelementptr inbounds i32, i32 addrspace(1)* %out, i32 1
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35 store i32 %3, i32 addrspace(1)* %arrayidx13
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36 ret void
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37 }
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38
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39 ; This test checks that the stack offset is calculated correctly for structs.
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40 ; All register loads/stores should be optimized away, so there shouldn't be
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41 ; any MOVA instructions.
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42 ;
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43 ; XXX: This generated code has unnecessary MOVs, we should be able to optimize
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44 ; this.
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45
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46 ; FUNC-LABEL: {{^}}multiple_structs:
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47 ; R600-NOT: MOVA_INT
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48 %struct.point = type { i32, i32 }
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49
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121
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50 define amdgpu_kernel void @multiple_structs(i32 addrspace(1)* %out) #0 {
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120
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51 entry:
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52 %a = alloca %struct.point
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53 %b = alloca %struct.point
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54 %a.x.ptr = getelementptr inbounds %struct.point, %struct.point* %a, i32 0, i32 0
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55 %a.y.ptr = getelementptr inbounds %struct.point, %struct.point* %a, i32 0, i32 1
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56 %b.x.ptr = getelementptr inbounds %struct.point, %struct.point* %b, i32 0, i32 0
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57 %b.y.ptr = getelementptr inbounds %struct.point, %struct.point* %b, i32 0, i32 1
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58 store i32 0, i32* %a.x.ptr
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59 store i32 1, i32* %a.y.ptr
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60 store i32 2, i32* %b.x.ptr
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61 store i32 3, i32* %b.y.ptr
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62 %a.indirect.ptr = getelementptr inbounds %struct.point, %struct.point* %a, i32 0, i32 0
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63 %b.indirect.ptr = getelementptr inbounds %struct.point, %struct.point* %b, i32 0, i32 0
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64 %a.indirect = load i32, i32* %a.indirect.ptr
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65 %b.indirect = load i32, i32* %b.indirect.ptr
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66 %0 = add i32 %a.indirect, %b.indirect
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67 store i32 %0, i32 addrspace(1)* %out
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68 ret void
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69 }
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70
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71 ; Test direct access of a private array inside a loop. The private array
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72 ; loads and stores should be lowered to copies, so there shouldn't be any
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73 ; MOVA instructions.
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74
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75 ; FUNC-LABEL: {{^}}direct_loop:
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76 ; R600-NOT: MOVA_INT
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77
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121
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78 define amdgpu_kernel void @direct_loop(i32 addrspace(1)* %out, i32 addrspace(1)* %in) #0 {
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120
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79 entry:
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80 %prv_array_const = alloca [2 x i32]
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81 %prv_array = alloca [2 x i32]
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82 %a = load i32, i32 addrspace(1)* %in
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83 %b_src_ptr = getelementptr inbounds i32, i32 addrspace(1)* %in, i32 1
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84 %b = load i32, i32 addrspace(1)* %b_src_ptr
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85 %a_dst_ptr = getelementptr inbounds [2 x i32], [2 x i32]* %prv_array_const, i32 0, i32 0
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86 store i32 %a, i32* %a_dst_ptr
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87 %b_dst_ptr = getelementptr inbounds [2 x i32], [2 x i32]* %prv_array_const, i32 0, i32 1
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88 store i32 %b, i32* %b_dst_ptr
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89 br label %for.body
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90
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91 for.body:
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92 %inc = phi i32 [0, %entry], [%count, %for.body]
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93 %x_ptr = getelementptr inbounds [2 x i32], [2 x i32]* %prv_array_const, i32 0, i32 0
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94 %x = load i32, i32* %x_ptr
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95 %y_ptr = getelementptr inbounds [2 x i32], [2 x i32]* %prv_array, i32 0, i32 0
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96 %y = load i32, i32* %y_ptr
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97 %xy = add i32 %x, %y
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98 store i32 %xy, i32* %y_ptr
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99 %count = add i32 %inc, 1
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100 %done = icmp eq i32 %count, 4095
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101 br i1 %done, label %for.end, label %for.body
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102
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103 for.end:
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104 %value_ptr = getelementptr inbounds [2 x i32], [2 x i32]* %prv_array, i32 0, i32 0
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105 %value = load i32, i32* %value_ptr
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106 store i32 %value, i32 addrspace(1)* %out
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107 ret void
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108 }
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109
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110 ; FUNC-LABEL: {{^}}short_array:
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111
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112 ; R600: MOVA_INT
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121
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113 define amdgpu_kernel void @short_array(i32 addrspace(1)* %out, i32 %index) #0 {
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120
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114 entry:
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115 %0 = alloca [2 x i16]
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116 %1 = getelementptr inbounds [2 x i16], [2 x i16]* %0, i32 0, i32 0
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117 %2 = getelementptr inbounds [2 x i16], [2 x i16]* %0, i32 0, i32 1
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118 store i16 0, i16* %1
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119 store i16 1, i16* %2
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120 %3 = getelementptr inbounds [2 x i16], [2 x i16]* %0, i32 0, i32 %index
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121 %4 = load i16, i16* %3
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122 %5 = sext i16 %4 to i32
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123 store i32 %5, i32 addrspace(1)* %out
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124 ret void
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125 }
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126
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127 ; FUNC-LABEL: {{^}}char_array:
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128
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129 ; R600: MOVA_INT
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121
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130 define amdgpu_kernel void @char_array(i32 addrspace(1)* %out, i32 %index) #0 {
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120
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131 entry:
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132 %0 = alloca [2 x i8]
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133 %1 = getelementptr inbounds [2 x i8], [2 x i8]* %0, i32 0, i32 0
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134 %2 = getelementptr inbounds [2 x i8], [2 x i8]* %0, i32 0, i32 1
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135 store i8 0, i8* %1
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136 store i8 1, i8* %2
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137 %3 = getelementptr inbounds [2 x i8], [2 x i8]* %0, i32 0, i32 %index
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138 %4 = load i8, i8* %3
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139 %5 = sext i8 %4 to i32
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140 store i32 %5, i32 addrspace(1)* %out
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141 ret void
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142
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143 }
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144
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145 ; Make sure we don't overwrite workitem information with private memory
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146
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147 ; FUNC-LABEL: {{^}}work_item_info:
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148 ; R600-NOT: MOV T0.X
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149 ; Additional check in case the move ends up in the last slot
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150 ; R600-NOT: MOV * TO.X
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121
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151 define amdgpu_kernel void @work_item_info(i32 addrspace(1)* %out, i32 %in) #0 {
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120
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152 entry:
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153 %0 = alloca [2 x i32]
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154 %1 = getelementptr inbounds [2 x i32], [2 x i32]* %0, i32 0, i32 0
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155 %2 = getelementptr inbounds [2 x i32], [2 x i32]* %0, i32 0, i32 1
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156 store i32 0, i32* %1
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157 store i32 1, i32* %2
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158 %3 = getelementptr inbounds [2 x i32], [2 x i32]* %0, i32 0, i32 %in
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159 %4 = load i32, i32* %3
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160 %5 = call i32 @llvm.r600.read.tidig.x()
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161 %6 = add i32 %4, %5
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162 store i32 %6, i32 addrspace(1)* %out
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163 ret void
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164 }
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165
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166 ; Test that two stack objects are not stored in the same register
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167 ; The second stack object should be in T3.X
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168 ; FUNC-LABEL: {{^}}no_overlap:
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169 ; R600_CHECK: MOV
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170 ; R600_CHECK: [[CHAN:[XYZW]]]+
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171 ; R600-NOT: [[CHAN]]+
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121
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172 define amdgpu_kernel void @no_overlap(i32 addrspace(1)* %out, i32 %in) #0 {
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120
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173 entry:
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174 %0 = alloca [3 x i8], align 1
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175 %1 = alloca [2 x i8], align 1
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176 %2 = getelementptr inbounds [3 x i8], [3 x i8]* %0, i32 0, i32 0
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177 %3 = getelementptr inbounds [3 x i8], [3 x i8]* %0, i32 0, i32 1
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178 %4 = getelementptr inbounds [3 x i8], [3 x i8]* %0, i32 0, i32 2
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179 %5 = getelementptr inbounds [2 x i8], [2 x i8]* %1, i32 0, i32 0
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180 %6 = getelementptr inbounds [2 x i8], [2 x i8]* %1, i32 0, i32 1
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181 store i8 0, i8* %2
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182 store i8 1, i8* %3
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183 store i8 2, i8* %4
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184 store i8 1, i8* %5
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185 store i8 0, i8* %6
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186 %7 = getelementptr inbounds [3 x i8], [3 x i8]* %0, i32 0, i32 %in
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187 %8 = getelementptr inbounds [2 x i8], [2 x i8]* %1, i32 0, i32 %in
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188 %9 = load i8, i8* %7
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189 %10 = load i8, i8* %8
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190 %11 = add i8 %9, %10
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191 %12 = sext i8 %11 to i32
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192 store i32 %12, i32 addrspace(1)* %out
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193 ret void
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194 }
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195
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121
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196 define amdgpu_kernel void @char_array_array(i32 addrspace(1)* %out, i32 %index) #0 {
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120
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197 entry:
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198 %alloca = alloca [2 x [2 x i8]]
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199 %gep0 = getelementptr inbounds [2 x [2 x i8]], [2 x [2 x i8]]* %alloca, i32 0, i32 0, i32 0
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200 %gep1 = getelementptr inbounds [2 x [2 x i8]], [2 x [2 x i8]]* %alloca, i32 0, i32 0, i32 1
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201 store i8 0, i8* %gep0
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202 store i8 1, i8* %gep1
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203 %gep2 = getelementptr inbounds [2 x [2 x i8]], [2 x [2 x i8]]* %alloca, i32 0, i32 0, i32 %index
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204 %load = load i8, i8* %gep2
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205 %sext = sext i8 %load to i32
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206 store i32 %sext, i32 addrspace(1)* %out
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207 ret void
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208 }
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209
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121
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210 define amdgpu_kernel void @i32_array_array(i32 addrspace(1)* %out, i32 %index) #0 {
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120
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211 entry:
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212 %alloca = alloca [2 x [2 x i32]]
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213 %gep0 = getelementptr inbounds [2 x [2 x i32]], [2 x [2 x i32]]* %alloca, i32 0, i32 0, i32 0
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214 %gep1 = getelementptr inbounds [2 x [2 x i32]], [2 x [2 x i32]]* %alloca, i32 0, i32 0, i32 1
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215 store i32 0, i32* %gep0
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216 store i32 1, i32* %gep1
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217 %gep2 = getelementptr inbounds [2 x [2 x i32]], [2 x [2 x i32]]* %alloca, i32 0, i32 0, i32 %index
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218 %load = load i32, i32* %gep2
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219 store i32 %load, i32 addrspace(1)* %out
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220 ret void
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221 }
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222
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121
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223 define amdgpu_kernel void @i64_array_array(i64 addrspace(1)* %out, i32 %index) #0 {
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120
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224 entry:
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225 %alloca = alloca [2 x [2 x i64]]
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226 %gep0 = getelementptr inbounds [2 x [2 x i64]], [2 x [2 x i64]]* %alloca, i32 0, i32 0, i32 0
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227 %gep1 = getelementptr inbounds [2 x [2 x i64]], [2 x [2 x i64]]* %alloca, i32 0, i32 0, i32 1
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228 store i64 0, i64* %gep0
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229 store i64 1, i64* %gep1
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230 %gep2 = getelementptr inbounds [2 x [2 x i64]], [2 x [2 x i64]]* %alloca, i32 0, i32 0, i32 %index
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231 %load = load i64, i64* %gep2
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232 store i64 %load, i64 addrspace(1)* %out
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233 ret void
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234 }
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235
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236 %struct.pair32 = type { i32, i32 }
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237
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121
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238 define amdgpu_kernel void @struct_array_array(i32 addrspace(1)* %out, i32 %index) #0 {
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120
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239 entry:
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240 %alloca = alloca [2 x [2 x %struct.pair32]]
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241 %gep0 = getelementptr inbounds [2 x [2 x %struct.pair32]], [2 x [2 x %struct.pair32]]* %alloca, i32 0, i32 0, i32 0, i32 1
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242 %gep1 = getelementptr inbounds [2 x [2 x %struct.pair32]], [2 x [2 x %struct.pair32]]* %alloca, i32 0, i32 0, i32 1, i32 1
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243 store i32 0, i32* %gep0
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244 store i32 1, i32* %gep1
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245 %gep2 = getelementptr inbounds [2 x [2 x %struct.pair32]], [2 x [2 x %struct.pair32]]* %alloca, i32 0, i32 0, i32 %index, i32 0
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246 %load = load i32, i32* %gep2
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247 store i32 %load, i32 addrspace(1)* %out
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248 ret void
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249 }
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250
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121
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251 define amdgpu_kernel void @struct_pair32_array(i32 addrspace(1)* %out, i32 %index) #0 {
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120
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252 entry:
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253 %alloca = alloca [2 x %struct.pair32]
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254 %gep0 = getelementptr inbounds [2 x %struct.pair32], [2 x %struct.pair32]* %alloca, i32 0, i32 0, i32 1
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255 %gep1 = getelementptr inbounds [2 x %struct.pair32], [2 x %struct.pair32]* %alloca, i32 0, i32 1, i32 0
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256 store i32 0, i32* %gep0
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257 store i32 1, i32* %gep1
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258 %gep2 = getelementptr inbounds [2 x %struct.pair32], [2 x %struct.pair32]* %alloca, i32 0, i32 %index, i32 0
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259 %load = load i32, i32* %gep2
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260 store i32 %load, i32 addrspace(1)* %out
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261 ret void
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262 }
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263
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121
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264 define amdgpu_kernel void @select_private(i32 addrspace(1)* %out, i32 %in) nounwind {
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120
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265 entry:
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266 %tmp = alloca [2 x i32]
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267 %tmp1 = getelementptr inbounds [2 x i32], [2 x i32]* %tmp, i32 0, i32 0
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268 %tmp2 = getelementptr inbounds [2 x i32], [2 x i32]* %tmp, i32 0, i32 1
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269 store i32 0, i32* %tmp1
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270 store i32 1, i32* %tmp2
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271 %cmp = icmp eq i32 %in, 0
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272 %sel = select i1 %cmp, i32* %tmp1, i32* %tmp2
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273 %load = load i32, i32* %sel
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274 store i32 %load, i32 addrspace(1)* %out
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275 ret void
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276 }
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277
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278 ; AMDGPUPromoteAlloca does not know how to handle ptrtoint. When it
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279 ; finds one, it should stop trying to promote.
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280
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281 ; FUNC-LABEL: ptrtoint:
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282 ; SI-NOT: ds_write
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283 ; SI: buffer_store_dword v{{[0-9]+}}, v{{[0-9]+}}, s[{{[0-9]+:[0-9]+}}], s{{[0-9]+}} offen
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284 ; SI: buffer_load_dword v{{[0-9]+}}, v{{[0-9]+}}, s[{{[0-9]+:[0-9]+}}], s{{[0-9]+}} offen ;
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121
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285 define amdgpu_kernel void @ptrtoint(i32 addrspace(1)* %out, i32 %a, i32 %b) #0 {
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120
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286 %alloca = alloca [16 x i32]
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287 %tmp0 = getelementptr inbounds [16 x i32], [16 x i32]* %alloca, i32 0, i32 %a
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288 store i32 5, i32* %tmp0
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289 %tmp1 = ptrtoint [16 x i32]* %alloca to i32
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290 %tmp2 = add i32 %tmp1, 5
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291 %tmp3 = inttoptr i32 %tmp2 to i32*
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292 %tmp4 = getelementptr inbounds i32, i32* %tmp3, i32 %b
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293 %tmp5 = load i32, i32* %tmp4
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294 store i32 %tmp5, i32 addrspace(1)* %out
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295 ret void
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296 }
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297
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121
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298 ; OPT: !0 = !{i32 0, i32 257}
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299 ; OPT: !1 = !{i32 0, i32 256}
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120
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300
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301 attributes #0 = { nounwind "amdgpu-waves-per-eu"="1,2" }
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