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annotate test/CodeGen/AMDGPU/select-i1.ll @ 128:c347d3398279 default tip

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fix
author mir3636
date Wed, 06 Dec 2017 14:37:17 +0900
parents 803732b1fca8
children
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1 ; RUN: llc -march=amdgcn -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
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2 ; RUN: llc -march=amdgcn -mcpu=tonga -mattr=-flat-for-global -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
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4 ; FIXME: This should go in existing select.ll test, except the current testcase there is broken on SI
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6 ; FUNC-LABEL: {{^}}select_i1:
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7 ; SI: v_cndmask_b32
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8 ; SI-NOT: v_cndmask_b32
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9 define amdgpu_kernel void @select_i1(i1 addrspace(1)* %out, i32 %cond, i1 %a, i1 %b) nounwind {
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10 %cmp = icmp ugt i32 %cond, 5
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11 %sel = select i1 %cmp, i1 %a, i1 %b
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12 store i1 %sel, i1 addrspace(1)* %out, align 4
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13 ret void
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14 }
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16 ; FUNC-LABEL: {{^}}s_minmax_i1:
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17 ; SI-DAG: buffer_load_ubyte [[COND:v[0-9]+]], off, s{{\[[0-9]+:[0-9]+\]}}, 0 offset:44
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18 ; SI-DAG: buffer_load_ubyte [[A:v[0-9]+]], off, s{{\[[0-9]+:[0-9]+\]}}, 0 offset:45
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19 ; SI-DAG: buffer_load_ubyte [[B:v[0-9]+]], off, s{{\[[0-9]+:[0-9]+\]}}, 0 offset:46
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20 ; SI: v_cmp_eq_u32_e32 vcc, 1, [[COND]]
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21 ; SI: v_cndmask_b32_e32 v{{[0-9]+}}, [[B]], [[A]]
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22 define amdgpu_kernel void @s_minmax_i1(i1 addrspace(1)* %out, i1 zeroext %cond, i1 zeroext %a, i1 zeroext %b) nounwind {
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23 %cmp = icmp slt i1 %cond, false
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24 %sel = select i1 %cmp, i1 %a, i1 %b
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25 store i1 %sel, i1 addrspace(1)* %out, align 4
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26 ret void
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27 }