annotate test/CodeGen/AMDGPU/simplifydemandedbits-recursion.ll @ 128:c347d3398279 default tip

fix
author mir3636
date Wed, 06 Dec 2017 14:37:17 +0900
parents 803732b1fca8
children
Ignore whitespace changes - Everywhere: Within whitespace: At end of lines:
rev   line source
121
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1 ; RUN: llc -march=amdgcn < %s | FileCheck %s
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2
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3 ; Check we can compile this bugpoint-reduced test without an
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4 ; infinite loop in TLI.SimplifyDemandedBits() due to failure
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5 ; to use return value of TLO.DAG.UpdateNodeOperands()
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6
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7 ; Check that code was generated; we know there will be
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8 ; a s_endpgm, so check for it.
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9
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10 @0 = external unnamed_addr addrspace(3) global [462 x float], align 4
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11
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12 ; Function Attrs: nounwind readnone speculatable
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13 declare i32 @llvm.amdgcn.workitem.id.y() #0
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14
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15 ; Function Attrs: nounwind readnone speculatable
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16 declare i32 @llvm.amdgcn.workitem.id.x() #0
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17
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18 ; Function Attrs: nounwind readnone speculatable
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19 declare float @llvm.fmuladd.f32(float, float, float) #0
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20
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21 ; CHECK: s_endpgm
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22 define amdgpu_kernel void @foo(float addrspace(1)* noalias nocapture readonly %arg, float addrspace(1)* noalias nocapture readonly %arg1, float addrspace(1)* noalias nocapture %arg2, float %arg3) local_unnamed_addr !reqd_work_group_size !0 {
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23 bb:
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24 %tmp = tail call i32 @llvm.amdgcn.workitem.id.y()
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25 %tmp4 = tail call i32 @llvm.amdgcn.workitem.id.x()
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26 %tmp5 = and i32 %tmp, 15
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27 %tmp6 = mul nuw nsw i32 %tmp5, 21
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28 %tmp7 = sub i32 %tmp6, 0
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29 %tmp8 = add i32 %tmp7, 0
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30 %tmp9 = add i32 %tmp8, 0
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31 %tmp10 = getelementptr inbounds [462 x float], [462 x float] addrspace(3)* @0, i32 0, i32 0
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32 br label %bb12
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33
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34 bb11: ; preds = %bb30
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35 br i1 undef, label %bb37, label %bb38
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36
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37 bb12: ; preds = %bb30, %bb
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38 br i1 false, label %.preheader, label %.loopexit145
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39
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40 .loopexit145: ; preds = %.preheader, %bb12
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41 br label %bb13
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42
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43 bb13: ; preds = %.loopexit, %.loopexit145
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44 %tmp14 = phi i32 [ %tmp5, %.loopexit145 ], [ %tmp20, %.loopexit ]
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45 %tmp15 = add nsw i32 %tmp14, -3
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46 %tmp16 = mul i32 %tmp14, 21
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47 br i1 undef, label %bb17, label %.loopexit
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48
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49 bb17: ; preds = %bb13
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50 %tmp18 = mul i32 %tmp15, 224
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51 %tmp19 = add i32 undef, %tmp18
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52 br label %bb21
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53
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54 .loopexit: ; preds = %bb21, %bb13
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55 %tmp20 = add nuw nsw i32 %tmp14, 16
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56 br i1 undef, label %bb13, label %bb26
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57
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58 bb21: ; preds = %bb21, %bb17
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59 %tmp22 = phi i32 [ %tmp4, %bb17 ], [ %tmp25, %bb21 ]
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60 %tmp23 = add i32 %tmp22, %tmp16
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61 %tmp24 = getelementptr inbounds float, float addrspace(3)* %tmp10, i32 %tmp23
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62 store float undef, float addrspace(3)* %tmp24, align 4
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63 %tmp25 = add nuw i32 %tmp22, 8
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64 br i1 undef, label %bb21, label %.loopexit
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65
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66 bb26: ; preds = %.loopexit
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67 br label %bb31
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68
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69 .preheader: ; preds = %.preheader, %bb12
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70 %tmp27 = phi i32 [ %tmp28, %.preheader ], [ undef, %bb12 ]
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71 %tmp28 = add nuw i32 %tmp27, 128
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72 %tmp29 = icmp ult i32 %tmp28, 1568
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73 br i1 %tmp29, label %.preheader, label %.loopexit145
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74
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75 bb30: ; preds = %bb31
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76 br i1 undef, label %bb11, label %bb12
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77
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78 bb31: ; preds = %bb31, %bb26
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79 %tmp32 = phi i32 [ %tmp9, %bb26 ], [ undef, %bb31 ]
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80 %tmp33 = getelementptr inbounds [462 x float], [462 x float] addrspace(3)* @0, i32 0, i32 %tmp32
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81 %tmp34 = load float, float addrspace(3)* %tmp33, align 4
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82 %tmp35 = tail call float @llvm.fmuladd.f32(float %tmp34, float undef, float undef)
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83 %tmp36 = tail call float @llvm.fmuladd.f32(float undef, float undef, float %tmp35)
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84 br i1 undef, label %bb30, label %bb31
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85
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86 bb37: ; preds = %bb11
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87 br label %bb38
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88
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89 bb38: ; preds = %bb37, %bb11
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90 ret void
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91 }
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92
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93 attributes #0 = { nounwind readnone speculatable }
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94
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95 !0 = !{i32 8, i32 16, i32 1}