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annotate test/CodeGen/AMDGPU/ssubo.ll @ 128:c347d3398279 default tip

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fix
author mir3636
date Wed, 06 Dec 2017 14:37:17 +0900
parents 803732b1fca8
children
Ignore whitespace changes - Everywhere: Within whitespace: At end of lines:
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1 ; RUN: llc -amdgpu-scalarize-global-loads=false -march=amdgcn -mcpu=tahiti -verify-machineinstrs< %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
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2 ; RUN: llc -amdgpu-scalarize-global-loads=false -march=amdgcn -mcpu=tonga -verify-machineinstrs< %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
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3 ; RUN: llc -amdgpu-scalarize-global-loads=false -march=r600 -mcpu=cypress -verify-machineinstrs< %s
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5 declare { i32, i1 } @llvm.ssub.with.overflow.i32(i32, i32) nounwind readnone
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6 declare { i64, i1 } @llvm.ssub.with.overflow.i64(i64, i64) nounwind readnone
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7
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8 ; FUNC-LABEL: {{^}}ssubo_i64_zext:
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9 define amdgpu_kernel void @ssubo_i64_zext(i64 addrspace(1)* %out, i64 %a, i64 %b) nounwind {
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10 %ssub = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %a, i64 %b) nounwind
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11 %val = extractvalue { i64, i1 } %ssub, 0
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12 %carry = extractvalue { i64, i1 } %ssub, 1
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13 %ext = zext i1 %carry to i64
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14 %add2 = add i64 %val, %ext
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15 store i64 %add2, i64 addrspace(1)* %out, align 8
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16 ret void
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17 }
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19 ; FUNC-LABEL: {{^}}s_ssubo_i32:
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20 define amdgpu_kernel void @s_ssubo_i32(i32 addrspace(1)* %out, i1 addrspace(1)* %carryout, i32 %a, i32 %b) nounwind {
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21 %ssub = call { i32, i1 } @llvm.ssub.with.overflow.i32(i32 %a, i32 %b) nounwind
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22 %val = extractvalue { i32, i1 } %ssub, 0
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23 %carry = extractvalue { i32, i1 } %ssub, 1
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24 store i32 %val, i32 addrspace(1)* %out, align 4
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25 store i1 %carry, i1 addrspace(1)* %carryout
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26 ret void
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27 }
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29 ; FUNC-LABEL: {{^}}v_ssubo_i32:
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30 define amdgpu_kernel void @v_ssubo_i32(i32 addrspace(1)* %out, i1 addrspace(1)* %carryout, i32 addrspace(1)* %aptr, i32 addrspace(1)* %bptr) nounwind {
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31 %a = load i32, i32 addrspace(1)* %aptr, align 4
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32 %b = load i32, i32 addrspace(1)* %bptr, align 4
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33 %ssub = call { i32, i1 } @llvm.ssub.with.overflow.i32(i32 %a, i32 %b) nounwind
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34 %val = extractvalue { i32, i1 } %ssub, 0
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35 %carry = extractvalue { i32, i1 } %ssub, 1
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36 store i32 %val, i32 addrspace(1)* %out, align 4
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37 store i1 %carry, i1 addrspace(1)* %carryout
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38 ret void
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39 }
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41 ; FUNC-LABEL: {{^}}s_ssubo_i64:
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42 ; SI: s_sub_u32
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43 ; SI: s_subb_u32
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44 define amdgpu_kernel void @s_ssubo_i64(i64 addrspace(1)* %out, i1 addrspace(1)* %carryout, i64 %a, i64 %b) nounwind {
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45 %ssub = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %a, i64 %b) nounwind
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46 %val = extractvalue { i64, i1 } %ssub, 0
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47 %carry = extractvalue { i64, i1 } %ssub, 1
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48 store i64 %val, i64 addrspace(1)* %out, align 8
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49 store i1 %carry, i1 addrspace(1)* %carryout
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50 ret void
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51 }
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53 ; FUNC-LABEL: {{^}}v_ssubo_i64:
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54 ; SI: v_sub_i32_e32
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55 ; SI: v_subb_u32_e32
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56 define amdgpu_kernel void @v_ssubo_i64(i64 addrspace(1)* %out, i1 addrspace(1)* %carryout, i64 addrspace(1)* %aptr, i64 addrspace(1)* %bptr) nounwind {
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57 %a = load i64, i64 addrspace(1)* %aptr, align 4
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58 %b = load i64, i64 addrspace(1)* %bptr, align 4
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59 %ssub = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %a, i64 %b) nounwind
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60 %val = extractvalue { i64, i1 } %ssub, 0
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61 %carry = extractvalue { i64, i1 } %ssub, 1
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62 store i64 %val, i64 addrspace(1)* %out, align 8
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63 store i1 %carry, i1 addrspace(1)* %carryout
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64 ret void
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65 }