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annotate test/CodeGen/AMDGPU/texture-input-merge.ll @ 128:c347d3398279 default tip

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fix
author mir3636
date Wed, 06 Dec 2017 14:37:17 +0900
parents 1172e4bd9c6f
children
Ignore whitespace changes - Everywhere: Within whitespace: At end of lines:
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95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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1 ;RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck %s
95c75e76d11b LLVM 3.4
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2
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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3 ;CHECK-NOT: MOV
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4
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5 define amdgpu_vs void @test(<4 x float> inreg %reg0) {
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95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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6 %1 = extractelement <4 x float> %reg0, i32 0
95c75e76d11b LLVM 3.4
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7 %2 = extractelement <4 x float> %reg0, i32 1
95c75e76d11b LLVM 3.4
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8 %3 = extractelement <4 x float> %reg0, i32 2
95c75e76d11b LLVM 3.4
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9 %4 = extractelement <4 x float> %reg0, i32 3
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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10 %5 = fmul float %1, 3.0
95c75e76d11b LLVM 3.4
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11 %6 = fmul float %2, 3.0
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12 %7 = fmul float %3, 3.0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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13 %8 = fmul float %4, 3.0
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14 %9 = insertelement <4 x float> undef, float %5, i32 0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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15 %10 = insertelement <4 x float> %9, float %6, i32 1
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16 %11 = insertelement <4 x float> undef, float %7, i32 0
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17 %12 = insertelement <4 x float> %11, float %5, i32 1
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18 %13 = insertelement <4 x float> undef, float %8, i32 0
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7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
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19 %14 = call <4 x float> @llvm.r600.tex(<4 x float> %10, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
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20 %15 = call <4 x float> @llvm.r600.tex(<4 x float> %12, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
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Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
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21 %16 = call <4 x float> @llvm.r600.tex(<4 x float> %13, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
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22 %17 = fadd <4 x float> %14, %15
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23 %18 = fadd <4 x float> %17, %16
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24 call void @llvm.r600.store.swizzle(<4 x float> %18, i32 0, i32 0)
0
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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25 ret void
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26 }
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7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
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28 declare <4 x float> @llvm.r600.tex(<4 x float>, i32, i32, i32, i32, i32, i32, i32, i32, i32) readnone
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29 declare void @llvm.r600.store.swizzle(<4 x float>, i32, i32)