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120
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1 ; RUN: llc -mtriple=arm-eabi -mattr=+v6 %s -o - | FileCheck %s --check-prefix=CHECK-V6
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2 ; RUN: llc -mtriple=arm-eabi -mattr=+v7 %s -o - | FileCheck %s --check-prefix=CHECK-V7
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0
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
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3
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
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4 define zeroext i8 @test1(i32 %A.u) {
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120
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5 ; CHECK-LABEL: test1
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6 ; CHECK-V6: uxtb
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7 ; CHECK-V7: uxtb
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0
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
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8 %B.u = trunc i32 %A.u to i8
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
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9 ret i8 %B.u
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
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10 }
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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changeset
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11
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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12 define zeroext i32 @test2(i32 %A.u, i32 %B.u) {
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120
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13 ; CHECK-LABEL: test2
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14 ; CHECK-V6: uxtab r0, r0, r1
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15 ; CHECK-V7: uxtab r0, r0, r1
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0
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
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16 %C.u = trunc i32 %B.u to i8
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
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17 %D.u = zext i8 %C.u to i32
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
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18 %E.u = add i32 %A.u, %D.u
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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19 ret i32 %E.u
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
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20 }
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
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21
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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changeset
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22 define zeroext i32 @test3(i32 %A.u) {
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120
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23 ; CHECK-LABEL: test3
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24 ; CHECK-V6-NOT: ubfx
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25 ; CHECK-V7: ubfx r0, r0, #8, #16
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0
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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changeset
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26 %B.u = lshr i32 %A.u, 8
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
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27 %C.u = shl i32 %A.u, 24
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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28 %D.u = or i32 %B.u, %C.u
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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changeset
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29 %E.u = trunc i32 %D.u to i16
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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30 %F.u = zext i16 %E.u to i32
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
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31 ret i32 %F.u
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
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32 }
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77
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33
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120
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34 define zeroext i32 @test4(i32 %A.u) {
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35 ; CHECK-LABEL: test4
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36 ; CHECK-V6-NOT: ubfx
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37 ; CHECK-V7: ubfx r0, r0, #8, #8
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38 %B.u = lshr i32 %A.u, 8
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39 %C.u = shl i32 %A.u, 24
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40 %D.u = or i32 %B.u, %C.u
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41 %E.u = trunc i32 %D.u to i8
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42 %F.u = zext i8 %E.u to i32
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43 ret i32 %F.u
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44 }
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45
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46 define zeroext i16 @test5(i32 %A.u) {
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47 ; CHECK-LABEL: test5
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48 ; CHECK-V6: uxth
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49 ; CHECK-V7: uxth
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50 %B.u = trunc i32 %A.u to i16
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51 ret i16 %B.u
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52 }
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53
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54 define zeroext i32 @test6(i32 %A.u, i32 %B.u) {
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55 ; CHECK-LABEL: test6
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56 ; CHECK-V6: uxtah r0, r0, r1
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57 ; CHECK-V7: uxtah r0, r0, r1
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58 %C.u = trunc i32 %B.u to i16
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59 %D.u = zext i16 %C.u to i32
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60 %E.u = add i32 %A.u, %D.u
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61 ret i32 %E.u
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62 }
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63
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64 define zeroext i32 @test7(i32 %A, i32 %X) {
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65 ; CHECK-LABEL: test7
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66 ; CHECK-V6: uxtab r0, r1, r0, ror #8
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67 ; CHECK-V7: uxtab r0, r1, r0, ror #8
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68 %B = lshr i32 %A, 8
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69 %C = shl i32 %A, 24
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70 %D = or i32 %B, %C
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71 %E = trunc i32 %D to i8
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72 %F = zext i8 %E to i32
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73 %G = add i32 %F, %X
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74 ret i32 %G
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75 }
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76
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77 define zeroext i32 @test8(i32 %A, i32 %X) {
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78 ; CHECK-LABEL: test8
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79 ; CHECK-V6: uxtab r0, r1, r0, ror #16
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80 ; CHECK-V7: uxtab r0, r1, r0, ror #16
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81 %B = lshr i32 %A, 16
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82 %C = shl i32 %A, 16
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83 %D = or i32 %B, %C
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84 %E = trunc i32 %D to i8
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85 %F = zext i8 %E to i32
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86 %G = add i32 %F, %X
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87 ret i32 %G
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88 }
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89
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90 define zeroext i32 @test9(i32 %A, i32 %X) {
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91 ; CHECK-LABEL: test9
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92 ; CHECK-V6: uxtah r0, r1, r0, ror #8
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93 ; CHECK-V7: uxtah r0, r1, r0, ror #8
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94 %B = lshr i32 %A, 8
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95 %C = shl i32 %A, 24
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96 %D = or i32 %B, %C
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97 %E = trunc i32 %D to i16
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98 %F = zext i16 %E to i32
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99 %G = add i32 %F, %X
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100 ret i32 %G
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101 }
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77
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102
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120
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103 define zeroext i32 @test10(i32 %A, i32 %X) {
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104 ; CHECK-LABEL: test10
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105 ; CHECK-V6: uxtah r0, r1, r0, ror #24
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106 ; CHECK-V7: uxtah r0, r1, r0, ror #24
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107 %B = lshr i32 %A, 24
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108 %C = shl i32 %A, 8
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109 %D = or i32 %B, %C
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110 %E = trunc i32 %D to i16
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111 %F = zext i16 %E to i32
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112 %G = add i32 %F, %X
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113 ret i32 %G
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114 }
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115
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116 define zeroext i32 @test11(i32 %A, i32 %X) {
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117 ; CHECK-LABEL: test11
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118 ; CHECK-V6: uxtab r0, r1, r0
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119 ; CHECK-V7: uxtab r0, r1, r0
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120 %B = and i32 %A, 255
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121 %add = add i32 %X, %B
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122 ret i32 %add
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123 }
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124
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125 define zeroext i32 @test12(i32 %A, i32 %X) {
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126 ; CHECK-LABEL: test12
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127 ; CHECK-V6: uxtab r0, r1, r0, ror #8
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128 ; CHECK-V7: uxtab r0, r1, r0, ror #8
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129 %B = lshr i32 %A, 8
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130 %and = and i32 %B, 255
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131 %add = add i32 %and, %X
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132 ret i32 %add
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133 }
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77
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134
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120
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135 define zeroext i32 @test13(i32 %A, i32 %X) {
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136 ; CHECK-LABEL: test13
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137 ; CHECK-V6: uxtab r0, r1, r0, ror #16
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138 ; CHECK-V7: uxtab r0, r1, r0, ror #16
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139 %B = lshr i32 %A, 16
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140 %and = and i32 %B, 255
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141 %add = add i32 %and, %X
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142 ret i32 %add
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143 }
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144
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145 define zeroext i32 @test14(i32 %A, i32 %X) {
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146 ; CHECK-LABEL: test14
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147 ; CHECK-V6: uxtah r0, r1, r0
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148 ; CHECK-V7: uxtah r0, r1, r0
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149 %B = and i32 %A, 65535
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150 %add = add i32 %X, %B
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151 ret i32 %add
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152 }
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77
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153
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120
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154 define zeroext i32 @test15(i32 %A, i32 %X) {
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155 ; CHECK-LABEL: test15
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156 ; CHECK-V6: uxtah r0, r1, r0, ror #8
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157 ; CHECK-V7: uxtah r0, r1, r0, ror #8
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158 %B = lshr i32 %A, 8
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159 %and = and i32 %B, 65535
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160 %add = add i32 %and, %X
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161 ret i32 %add
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162 }
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163
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164 define zeroext i32 @test16(i32 %A, i32 %X) {
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165 ; CHECK-LABEL: test16
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166 ; CHECK-V6: uxtah r0, r1, r0, ror #24
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167 ; CHECK-V7: uxtah r0, r1, r0, ror #24
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168 %B = lshr i32 %A, 24
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169 %C = shl i32 %A, 8
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170 %D = or i32 %B, %C
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171 %E = and i32 %D, 65535
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172 %F = add i32 %E, %X
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173 ret i32 %F
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174 }
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