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annotate test/CodeGen/ARM/vector-spilling.ll @ 128:c347d3398279 default tip

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fix
author mir3636
date Wed, 06 Dec 2017 14:37:17 +0900
parents 803732b1fca8
children
Ignore whitespace changes - Everywhere: Within whitespace: At end of lines:
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803732b1fca8 LLVM 5.0
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1 ; RUN: llc < %s -mtriple=armv7-linux-gnueabihf -arm-atomic-cfg-tidy=0 -float-abi=hard -mcpu=cortex-a9 -O3 | FileCheck %s
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3 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-n32-S64"
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5 ; This test will generate spills/fills using vldmia instructions that access 24 bytes of memory.
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6 ; Check that we don't crash when we generate these instructions on Cortex-A9.
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8 ; CHECK: test:
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9 ; CHECK: vstmia
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10 ; CHECK: vldmia
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11 define void @test(<8 x i64>* %src) #0 {
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12 entry:
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13 %0 = getelementptr inbounds <8 x i64>, <8 x i64>* %src, i32 0
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14 %1 = load <8 x i64>, <8 x i64>* %0, align 8
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16 %2 = getelementptr inbounds <8 x i64>, <8 x i64>* %src, i32 1
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17 %3 = load <8 x i64>, <8 x i64>* %2, align 8
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19 %4 = getelementptr inbounds <8 x i64>, <8 x i64>* %src, i32 2
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20 %5 = load <8 x i64>, <8 x i64>* %4, align 8
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22 %6 = getelementptr inbounds <8 x i64>, <8 x i64>* %src, i32 3
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23 %7 = load <8 x i64>, <8 x i64>* %6, align 8
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25 %8 = shufflevector <8 x i64> %1, <8 x i64> %3, <8 x i32> <i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11>
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26 %9 = shufflevector <8 x i64> %1, <8 x i64> %3, <8 x i32> <i32 4, i32 12, i32 5, i32 13, i32 6, i32 14, i32 7, i32 15>
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28 tail call void(<8 x i64>, <8 x i64>, <8 x i64>, <8 x i64>, <8 x i64>, <8 x i64>) @foo(<8 x i64> %1, <8 x i64> %3, <8 x i64> %5, <8 x i64> %7, <8 x i64> %8, <8 x i64> %9)
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29 ret void
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30 }
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32 declare void @foo(<8 x i64>, <8 x i64>, <8 x i64>, <8 x i64>, <8 x i64>, <8 x i64>)
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34 attributes #0 = { noredzone "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-frame-pointer-elim-non-leaf"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "unsafe-fp-math"="false" "use-soft-float"="false" }