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annotate test/CodeGen/ARM/vld2.ll @ 128:c347d3398279 default tip

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fix
author mir3636
date Wed, 06 Dec 2017 14:37:17 +0900
parents 803732b1fca8
children
Ignore whitespace changes - Everywhere: Within whitespace: At end of lines:
rev   line source
77
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 0
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1 ; RUN: llc -mtriple=arm-eabi -mattr=+neon %s -o - | FileCheck %s
0
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2
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3 %struct.__neon_int8x8x2_t = type { <8 x i8>, <8 x i8> }
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4 %struct.__neon_int16x4x2_t = type { <4 x i16>, <4 x i16> }
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5 %struct.__neon_int32x2x2_t = type { <2 x i32>, <2 x i32> }
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parents:
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6 %struct.__neon_float32x2x2_t = type { <2 x float>, <2 x float> }
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7 %struct.__neon_int64x1x2_t = type { <1 x i64>, <1 x i64> }
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8
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9 %struct.__neon_int8x16x2_t = type { <16 x i8>, <16 x i8> }
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10 %struct.__neon_int16x8x2_t = type { <8 x i16>, <8 x i16> }
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11 %struct.__neon_int32x4x2_t = type { <4 x i32>, <4 x i32> }
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parents:
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12 %struct.__neon_float32x4x2_t = type { <4 x float>, <4 x float> }
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13
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14 define <8 x i8> @vld2i8(i8* %A) nounwind {
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15 ;CHECK-LABEL: vld2i8:
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16 ;Check the alignment value. Max for this instruction is 128 bits:
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17 ;CHECK: vld2.8 {d16, d17}, [{{r[0-9]+|lr}}:64]
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parents: 77
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18 %tmp1 = call %struct.__neon_int8x8x2_t @llvm.arm.neon.vld2.v8i8.p0i8(i8* %A, i32 8)
0
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19 %tmp2 = extractvalue %struct.__neon_int8x8x2_t %tmp1, 0
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parents:
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20 %tmp3 = extractvalue %struct.__neon_int8x8x2_t %tmp1, 1
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21 %tmp4 = add <8 x i8> %tmp2, %tmp3
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22 ret <8 x i8> %tmp4
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23 }
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24
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25 define <4 x i16> @vld2i16(i16* %A) nounwind {
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26 ;CHECK-LABEL: vld2i16:
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27 ;Check the alignment value. Max for this instruction is 128 bits:
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28 ;CHECK: vld2.16 {d16, d17}, [{{r[0-9]+|lr}}:128]
0
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29 %tmp0 = bitcast i16* %A to i8*
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30 %tmp1 = call %struct.__neon_int16x4x2_t @llvm.arm.neon.vld2.v4i16.p0i8(i8* %tmp0, i32 32)
0
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31 %tmp2 = extractvalue %struct.__neon_int16x4x2_t %tmp1, 0
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32 %tmp3 = extractvalue %struct.__neon_int16x4x2_t %tmp1, 1
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33 %tmp4 = add <4 x i16> %tmp2, %tmp3
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34 ret <4 x i16> %tmp4
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35 }
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36
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37 define <2 x i32> @vld2i32(i32* %A) nounwind {
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parents:
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38 ;CHECK-LABEL: vld2i32:
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parents:
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39 ;CHECK: vld2.32
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40 %tmp0 = bitcast i32* %A to i8*
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afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 77
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41 %tmp1 = call %struct.__neon_int32x2x2_t @llvm.arm.neon.vld2.v2i32.p0i8(i8* %tmp0, i32 1)
0
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42 %tmp2 = extractvalue %struct.__neon_int32x2x2_t %tmp1, 0
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parents:
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43 %tmp3 = extractvalue %struct.__neon_int32x2x2_t %tmp1, 1
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parents:
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44 %tmp4 = add <2 x i32> %tmp2, %tmp3
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parents:
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45 ret <2 x i32> %tmp4
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46 }
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47
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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48 define <2 x float> @vld2f(float* %A) nounwind {
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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49 ;CHECK-LABEL: vld2f:
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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50 ;CHECK: vld2.32
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51 %tmp0 = bitcast float* %A to i8*
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afa8332a0e37 LLVM 3.8
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parents: 77
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52 %tmp1 = call %struct.__neon_float32x2x2_t @llvm.arm.neon.vld2.v2f32.p0i8(i8* %tmp0, i32 1)
0
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53 %tmp2 = extractvalue %struct.__neon_float32x2x2_t %tmp1, 0
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parents:
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54 %tmp3 = extractvalue %struct.__neon_float32x2x2_t %tmp1, 1
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parents:
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55 %tmp4 = fadd <2 x float> %tmp2, %tmp3
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56 ret <2 x float> %tmp4
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57 }
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parents:
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58
95c75e76d11b LLVM 3.4
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59 ;Check for a post-increment updating load.
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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60 define <2 x float> @vld2f_update(float** %ptr) nounwind {
95c75e76d11b LLVM 3.4
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parents:
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61 ;CHECK-LABEL: vld2f_update:
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kono
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62 ;CHECK: vld2.32 {d16, d17}, [{{r[0-9]+|lr}}]!
95
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parents: 77
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63 %A = load float*, float** %ptr
0
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64 %tmp0 = bitcast float* %A to i8*
95
afa8332a0e37 LLVM 3.8
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parents: 77
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65 %tmp1 = call %struct.__neon_float32x2x2_t @llvm.arm.neon.vld2.v2f32.p0i8(i8* %tmp0, i32 1)
0
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parents:
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66 %tmp2 = extractvalue %struct.__neon_float32x2x2_t %tmp1, 0
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parents:
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67 %tmp3 = extractvalue %struct.__neon_float32x2x2_t %tmp1, 1
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68 %tmp4 = fadd <2 x float> %tmp2, %tmp3
95
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69 %tmp5 = getelementptr float, float* %A, i32 4
0
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70 store float* %tmp5, float** %ptr
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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71 ret <2 x float> %tmp4
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72 }
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73
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74 define <1 x i64> @vld2i64(i64* %A) nounwind {
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parents:
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75 ;CHECK-LABEL: vld2i64:
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parents:
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76 ;Check the alignment value. Max for this instruction is 128 bits:
121
803732b1fca8 LLVM 5.0
kono
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77 ;CHECK: vld1.64 {d16, d17}, [{{r[0-9]+|lr}}:128]
0
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parents:
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78 %tmp0 = bitcast i64* %A to i8*
95
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79 %tmp1 = call %struct.__neon_int64x1x2_t @llvm.arm.neon.vld2.v1i64.p0i8(i8* %tmp0, i32 32)
0
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80 %tmp2 = extractvalue %struct.__neon_int64x1x2_t %tmp1, 0
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parents:
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81 %tmp3 = extractvalue %struct.__neon_int64x1x2_t %tmp1, 1
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parents:
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82 %tmp4 = add <1 x i64> %tmp2, %tmp3
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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83 ret <1 x i64> %tmp4
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84 }
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85
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86 define <16 x i8> @vld2Qi8(i8* %A) nounwind {
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87 ;CHECK-LABEL: vld2Qi8:
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parents:
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88 ;Check the alignment value. Max for this instruction is 256 bits:
121
803732b1fca8 LLVM 5.0
kono
parents: 95
diff changeset
89 ;CHECK: vld2.8 {d16, d17, d18, d19}, [{{r[0-9]+|lr}}:64]
95
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 77
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90 %tmp1 = call %struct.__neon_int8x16x2_t @llvm.arm.neon.vld2.v16i8.p0i8(i8* %A, i32 8)
0
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parents:
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91 %tmp2 = extractvalue %struct.__neon_int8x16x2_t %tmp1, 0
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parents:
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92 %tmp3 = extractvalue %struct.__neon_int8x16x2_t %tmp1, 1
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parents:
diff changeset
93 %tmp4 = add <16 x i8> %tmp2, %tmp3
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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94 ret <16 x i8> %tmp4
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95 }
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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96
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97 ;Check for a post-increment updating load with register increment.
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
98 define <16 x i8> @vld2Qi8_update(i8** %ptr, i32 %inc) nounwind {
95c75e76d11b LLVM 3.4
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parents:
diff changeset
99 ;CHECK-LABEL: vld2Qi8_update:
121
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kono
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100 ;CHECK: vld2.8 {d16, d17, d18, d19}, [{{r[0-9]+|lr}}:128], r1
95
afa8332a0e37 LLVM 3.8
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101 %A = load i8*, i8** %ptr
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parents: 77
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102 %tmp1 = call %struct.__neon_int8x16x2_t @llvm.arm.neon.vld2.v16i8.p0i8(i8* %A, i32 16)
0
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parents:
diff changeset
103 %tmp2 = extractvalue %struct.__neon_int8x16x2_t %tmp1, 0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
104 %tmp3 = extractvalue %struct.__neon_int8x16x2_t %tmp1, 1
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
105 %tmp4 = add <16 x i8> %tmp2, %tmp3
95
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parents: 77
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106 %tmp5 = getelementptr i8, i8* %A, i32 %inc
0
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parents:
diff changeset
107 store i8* %tmp5, i8** %ptr
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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108 ret <16 x i8> %tmp4
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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109 }
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
110
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
111 define <8 x i16> @vld2Qi16(i16* %A) nounwind {
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
112 ;CHECK-LABEL: vld2Qi16:
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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113 ;Check the alignment value. Max for this instruction is 256 bits:
121
803732b1fca8 LLVM 5.0
kono
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114 ;CHECK: vld2.16 {d16, d17, d18, d19}, [{{r[0-9]+|lr}}:128]
0
95c75e76d11b LLVM 3.4
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115 %tmp0 = bitcast i16* %A to i8*
95
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parents: 77
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116 %tmp1 = call %struct.__neon_int16x8x2_t @llvm.arm.neon.vld2.v8i16.p0i8(i8* %tmp0, i32 16)
0
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117 %tmp2 = extractvalue %struct.__neon_int16x8x2_t %tmp1, 0
95c75e76d11b LLVM 3.4
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118 %tmp3 = extractvalue %struct.__neon_int16x8x2_t %tmp1, 1
95c75e76d11b LLVM 3.4
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119 %tmp4 = add <8 x i16> %tmp2, %tmp3
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120 ret <8 x i16> %tmp4
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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121 }
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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122
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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123 define <4 x i32> @vld2Qi32(i32* %A) nounwind {
95c75e76d11b LLVM 3.4
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124 ;CHECK-LABEL: vld2Qi32:
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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125 ;Check the alignment value. Max for this instruction is 256 bits:
121
803732b1fca8 LLVM 5.0
kono
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126 ;CHECK: vld2.32 {d16, d17, d18, d19}, [{{r[0-9]+|lr}}:256]
0
95c75e76d11b LLVM 3.4
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127 %tmp0 = bitcast i32* %A to i8*
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parents: 77
diff changeset
128 %tmp1 = call %struct.__neon_int32x4x2_t @llvm.arm.neon.vld2.v4i32.p0i8(i8* %tmp0, i32 64)
0
95c75e76d11b LLVM 3.4
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129 %tmp2 = extractvalue %struct.__neon_int32x4x2_t %tmp1, 0
95c75e76d11b LLVM 3.4
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130 %tmp3 = extractvalue %struct.__neon_int32x4x2_t %tmp1, 1
95c75e76d11b LLVM 3.4
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131 %tmp4 = add <4 x i32> %tmp2, %tmp3
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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132 ret <4 x i32> %tmp4
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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133 }
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
134
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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135 define <4 x float> @vld2Qf(float* %A) nounwind {
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
136 ;CHECK-LABEL: vld2Qf:
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
137 ;CHECK: vld2.32
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
138 %tmp0 = bitcast float* %A to i8*
95
afa8332a0e37 LLVM 3.8
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parents: 77
diff changeset
139 %tmp1 = call %struct.__neon_float32x4x2_t @llvm.arm.neon.vld2.v4f32.p0i8(i8* %tmp0, i32 1)
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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diff changeset
140 %tmp2 = extractvalue %struct.__neon_float32x4x2_t %tmp1, 0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
141 %tmp3 = extractvalue %struct.__neon_float32x4x2_t %tmp1, 1
95c75e76d11b LLVM 3.4
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parents:
diff changeset
142 %tmp4 = fadd <4 x float> %tmp2, %tmp3
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
143 ret <4 x float> %tmp4
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
144 }
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
145
95
afa8332a0e37 LLVM 3.8
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parents: 77
diff changeset
146 declare %struct.__neon_int8x8x2_t @llvm.arm.neon.vld2.v8i8.p0i8(i8*, i32) nounwind readonly
afa8332a0e37 LLVM 3.8
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parents: 77
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147 declare %struct.__neon_int16x4x2_t @llvm.arm.neon.vld2.v4i16.p0i8(i8*, i32) nounwind readonly
afa8332a0e37 LLVM 3.8
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parents: 77
diff changeset
148 declare %struct.__neon_int32x2x2_t @llvm.arm.neon.vld2.v2i32.p0i8(i8*, i32) nounwind readonly
afa8332a0e37 LLVM 3.8
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parents: 77
diff changeset
149 declare %struct.__neon_float32x2x2_t @llvm.arm.neon.vld2.v2f32.p0i8(i8*, i32) nounwind readonly
afa8332a0e37 LLVM 3.8
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parents: 77
diff changeset
150 declare %struct.__neon_int64x1x2_t @llvm.arm.neon.vld2.v1i64.p0i8(i8*, i32) nounwind readonly
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
151
95
afa8332a0e37 LLVM 3.8
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parents: 77
diff changeset
152 declare %struct.__neon_int8x16x2_t @llvm.arm.neon.vld2.v16i8.p0i8(i8*, i32) nounwind readonly
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
153 declare %struct.__neon_int16x8x2_t @llvm.arm.neon.vld2.v8i16.p0i8(i8*, i32) nounwind readonly
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
154 declare %struct.__neon_int32x4x2_t @llvm.arm.neon.vld2.v4i32.p0i8(i8*, i32) nounwind readonly
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
155 declare %struct.__neon_float32x4x2_t @llvm.arm.neon.vld2.v4f32.p0i8(i8*, i32) nounwind readonly