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fix
author mir3636
date Wed, 06 Dec 2017 14:37:17 +0900
parents afa8332a0e37
children
Ignore whitespace changes - Everywhere: Within whitespace: At end of lines:
rev   line source
77
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
1 ; RUN: llc -mtriple=arm-eabi -mattr=+neon %s -o - | FileCheck %s
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
2
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
3 define <8 x i8> @vqsubs8(<8 x i8>* %A, <8 x i8>* %B) nounwind {
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
4 ;CHECK-LABEL: vqsubs8:
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
5 ;CHECK: vqsub.s8
95
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
6 %tmp1 = load <8 x i8>, <8 x i8>* %A
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
7 %tmp2 = load <8 x i8>, <8 x i8>* %B
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
8 %tmp3 = call <8 x i8> @llvm.arm.neon.vqsubs.v8i8(<8 x i8> %tmp1, <8 x i8> %tmp2)
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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9 ret <8 x i8> %tmp3
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parents:
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10 }
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parents:
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11
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parents:
diff changeset
12 define <4 x i16> @vqsubs16(<4 x i16>* %A, <4 x i16>* %B) nounwind {
95c75e76d11b LLVM 3.4
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parents:
diff changeset
13 ;CHECK-LABEL: vqsubs16:
95c75e76d11b LLVM 3.4
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parents:
diff changeset
14 ;CHECK: vqsub.s16
95
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parents: 77
diff changeset
15 %tmp1 = load <4 x i16>, <4 x i16>* %A
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
16 %tmp2 = load <4 x i16>, <4 x i16>* %B
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
17 %tmp3 = call <4 x i16> @llvm.arm.neon.vqsubs.v4i16(<4 x i16> %tmp1, <4 x i16> %tmp2)
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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18 ret <4 x i16> %tmp3
95c75e76d11b LLVM 3.4
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parents:
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19 }
95c75e76d11b LLVM 3.4
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parents:
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20
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parents:
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21 define <2 x i32> @vqsubs32(<2 x i32>* %A, <2 x i32>* %B) nounwind {
95c75e76d11b LLVM 3.4
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parents:
diff changeset
22 ;CHECK-LABEL: vqsubs32:
95c75e76d11b LLVM 3.4
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parents:
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23 ;CHECK: vqsub.s32
95
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parents: 77
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24 %tmp1 = load <2 x i32>, <2 x i32>* %A
afa8332a0e37 LLVM 3.8
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parents: 77
diff changeset
25 %tmp2 = load <2 x i32>, <2 x i32>* %B
0
95c75e76d11b LLVM 3.4
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parents:
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26 %tmp3 = call <2 x i32> @llvm.arm.neon.vqsubs.v2i32(<2 x i32> %tmp1, <2 x i32> %tmp2)
95c75e76d11b LLVM 3.4
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parents:
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27 ret <2 x i32> %tmp3
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parents:
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28 }
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parents:
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29
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parents:
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30 define <1 x i64> @vqsubs64(<1 x i64>* %A, <1 x i64>* %B) nounwind {
95c75e76d11b LLVM 3.4
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parents:
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31 ;CHECK-LABEL: vqsubs64:
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parents:
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32 ;CHECK: vqsub.s64
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parents: 77
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33 %tmp1 = load <1 x i64>, <1 x i64>* %A
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parents: 77
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34 %tmp2 = load <1 x i64>, <1 x i64>* %B
0
95c75e76d11b LLVM 3.4
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parents:
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35 %tmp3 = call <1 x i64> @llvm.arm.neon.vqsubs.v1i64(<1 x i64> %tmp1, <1 x i64> %tmp2)
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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36 ret <1 x i64> %tmp3
95c75e76d11b LLVM 3.4
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parents:
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37 }
95c75e76d11b LLVM 3.4
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parents:
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38
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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39 define <8 x i8> @vqsubu8(<8 x i8>* %A, <8 x i8>* %B) nounwind {
95c75e76d11b LLVM 3.4
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parents:
diff changeset
40 ;CHECK-LABEL: vqsubu8:
95c75e76d11b LLVM 3.4
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parents:
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41 ;CHECK: vqsub.u8
95
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
42 %tmp1 = load <8 x i8>, <8 x i8>* %A
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
43 %tmp2 = load <8 x i8>, <8 x i8>* %B
0
95c75e76d11b LLVM 3.4
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parents:
diff changeset
44 %tmp3 = call <8 x i8> @llvm.arm.neon.vqsubu.v8i8(<8 x i8> %tmp1, <8 x i8> %tmp2)
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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45 ret <8 x i8> %tmp3
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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46 }
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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47
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
48 define <4 x i16> @vqsubu16(<4 x i16>* %A, <4 x i16>* %B) nounwind {
95c75e76d11b LLVM 3.4
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parents:
diff changeset
49 ;CHECK-LABEL: vqsubu16:
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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50 ;CHECK: vqsub.u16
95
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
51 %tmp1 = load <4 x i16>, <4 x i16>* %A
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
52 %tmp2 = load <4 x i16>, <4 x i16>* %B
0
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
53 %tmp3 = call <4 x i16> @llvm.arm.neon.vqsubu.v4i16(<4 x i16> %tmp1, <4 x i16> %tmp2)
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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54 ret <4 x i16> %tmp3
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parents:
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55 }
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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56
95c75e76d11b LLVM 3.4
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parents:
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57 define <2 x i32> @vqsubu32(<2 x i32>* %A, <2 x i32>* %B) nounwind {
95c75e76d11b LLVM 3.4
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parents:
diff changeset
58 ;CHECK-LABEL: vqsubu32:
95c75e76d11b LLVM 3.4
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parents:
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59 ;CHECK: vqsub.u32
95
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parents: 77
diff changeset
60 %tmp1 = load <2 x i32>, <2 x i32>* %A
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parents: 77
diff changeset
61 %tmp2 = load <2 x i32>, <2 x i32>* %B
0
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
62 %tmp3 = call <2 x i32> @llvm.arm.neon.vqsubu.v2i32(<2 x i32> %tmp1, <2 x i32> %tmp2)
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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63 ret <2 x i32> %tmp3
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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64 }
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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65
95c75e76d11b LLVM 3.4
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parents:
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66 define <1 x i64> @vqsubu64(<1 x i64>* %A, <1 x i64>* %B) nounwind {
95c75e76d11b LLVM 3.4
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parents:
diff changeset
67 ;CHECK-LABEL: vqsubu64:
95c75e76d11b LLVM 3.4
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parents:
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68 ;CHECK: vqsub.u64
95
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parents: 77
diff changeset
69 %tmp1 = load <1 x i64>, <1 x i64>* %A
afa8332a0e37 LLVM 3.8
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parents: 77
diff changeset
70 %tmp2 = load <1 x i64>, <1 x i64>* %B
0
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parents:
diff changeset
71 %tmp3 = call <1 x i64> @llvm.arm.neon.vqsubu.v1i64(<1 x i64> %tmp1, <1 x i64> %tmp2)
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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72 ret <1 x i64> %tmp3
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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73 }
95c75e76d11b LLVM 3.4
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parents:
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74
95c75e76d11b LLVM 3.4
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parents:
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75 define <16 x i8> @vqsubQs8(<16 x i8>* %A, <16 x i8>* %B) nounwind {
95c75e76d11b LLVM 3.4
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parents:
diff changeset
76 ;CHECK-LABEL: vqsubQs8:
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parents:
diff changeset
77 ;CHECK: vqsub.s8
95
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parents: 77
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78 %tmp1 = load <16 x i8>, <16 x i8>* %A
afa8332a0e37 LLVM 3.8
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parents: 77
diff changeset
79 %tmp2 = load <16 x i8>, <16 x i8>* %B
0
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parents:
diff changeset
80 %tmp3 = call <16 x i8> @llvm.arm.neon.vqsubs.v16i8(<16 x i8> %tmp1, <16 x i8> %tmp2)
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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81 ret <16 x i8> %tmp3
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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82 }
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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83
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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84 define <8 x i16> @vqsubQs16(<8 x i16>* %A, <8 x i16>* %B) nounwind {
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
85 ;CHECK-LABEL: vqsubQs16:
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
86 ;CHECK: vqsub.s16
95
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parents: 77
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87 %tmp1 = load <8 x i16>, <8 x i16>* %A
afa8332a0e37 LLVM 3.8
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parents: 77
diff changeset
88 %tmp2 = load <8 x i16>, <8 x i16>* %B
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
89 %tmp3 = call <8 x i16> @llvm.arm.neon.vqsubs.v8i16(<8 x i16> %tmp1, <8 x i16> %tmp2)
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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90 ret <8 x i16> %tmp3
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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91 }
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
92
95c75e76d11b LLVM 3.4
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parents:
diff changeset
93 define <4 x i32> @vqsubQs32(<4 x i32>* %A, <4 x i32>* %B) nounwind {
95c75e76d11b LLVM 3.4
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parents:
diff changeset
94 ;CHECK-LABEL: vqsubQs32:
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
95 ;CHECK: vqsub.s32
95
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parents: 77
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96 %tmp1 = load <4 x i32>, <4 x i32>* %A
afa8332a0e37 LLVM 3.8
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parents: 77
diff changeset
97 %tmp2 = load <4 x i32>, <4 x i32>* %B
0
95c75e76d11b LLVM 3.4
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parents:
diff changeset
98 %tmp3 = call <4 x i32> @llvm.arm.neon.vqsubs.v4i32(<4 x i32> %tmp1, <4 x i32> %tmp2)
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
99 ret <4 x i32> %tmp3
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
100 }
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
101
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
102 define <2 x i64> @vqsubQs64(<2 x i64>* %A, <2 x i64>* %B) nounwind {
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
103 ;CHECK-LABEL: vqsubQs64:
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
104 ;CHECK: vqsub.s64
95
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
105 %tmp1 = load <2 x i64>, <2 x i64>* %A
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
106 %tmp2 = load <2 x i64>, <2 x i64>* %B
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
107 %tmp3 = call <2 x i64> @llvm.arm.neon.vqsubs.v2i64(<2 x i64> %tmp1, <2 x i64> %tmp2)
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
108 ret <2 x i64> %tmp3
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
109 }
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
110
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
111 define <16 x i8> @vqsubQu8(<16 x i8>* %A, <16 x i8>* %B) nounwind {
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
112 ;CHECK-LABEL: vqsubQu8:
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
113 ;CHECK: vqsub.u8
95
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114 %tmp1 = load <16 x i8>, <16 x i8>* %A
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115 %tmp2 = load <16 x i8>, <16 x i8>* %B
0
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116 %tmp3 = call <16 x i8> @llvm.arm.neon.vqsubu.v16i8(<16 x i8> %tmp1, <16 x i8> %tmp2)
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117 ret <16 x i8> %tmp3
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118 }
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119
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120 define <8 x i16> @vqsubQu16(<8 x i16>* %A, <8 x i16>* %B) nounwind {
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121 ;CHECK-LABEL: vqsubQu16:
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122 ;CHECK: vqsub.u16
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123 %tmp1 = load <8 x i16>, <8 x i16>* %A
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124 %tmp2 = load <8 x i16>, <8 x i16>* %B
0
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125 %tmp3 = call <8 x i16> @llvm.arm.neon.vqsubu.v8i16(<8 x i16> %tmp1, <8 x i16> %tmp2)
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126 ret <8 x i16> %tmp3
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127 }
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128
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129 define <4 x i32> @vqsubQu32(<4 x i32>* %A, <4 x i32>* %B) nounwind {
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130 ;CHECK-LABEL: vqsubQu32:
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131 ;CHECK: vqsub.u32
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132 %tmp1 = load <4 x i32>, <4 x i32>* %A
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133 %tmp2 = load <4 x i32>, <4 x i32>* %B
0
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134 %tmp3 = call <4 x i32> @llvm.arm.neon.vqsubu.v4i32(<4 x i32> %tmp1, <4 x i32> %tmp2)
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135 ret <4 x i32> %tmp3
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136 }
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parents:
diff changeset
137
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138 define <2 x i64> @vqsubQu64(<2 x i64>* %A, <2 x i64>* %B) nounwind {
95c75e76d11b LLVM 3.4
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139 ;CHECK-LABEL: vqsubQu64:
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140 ;CHECK: vqsub.u64
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diff changeset
141 %tmp1 = load <2 x i64>, <2 x i64>* %A
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142 %tmp2 = load <2 x i64>, <2 x i64>* %B
0
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143 %tmp3 = call <2 x i64> @llvm.arm.neon.vqsubu.v2i64(<2 x i64> %tmp1, <2 x i64> %tmp2)
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144 ret <2 x i64> %tmp3
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parents:
diff changeset
145 }
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parents:
diff changeset
146
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147 declare <8 x i8> @llvm.arm.neon.vqsubs.v8i8(<8 x i8>, <8 x i8>) nounwind readnone
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148 declare <4 x i16> @llvm.arm.neon.vqsubs.v4i16(<4 x i16>, <4 x i16>) nounwind readnone
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149 declare <2 x i32> @llvm.arm.neon.vqsubs.v2i32(<2 x i32>, <2 x i32>) nounwind readnone
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150 declare <1 x i64> @llvm.arm.neon.vqsubs.v1i64(<1 x i64>, <1 x i64>) nounwind readnone
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parents:
diff changeset
151
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152 declare <8 x i8> @llvm.arm.neon.vqsubu.v8i8(<8 x i8>, <8 x i8>) nounwind readnone
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153 declare <4 x i16> @llvm.arm.neon.vqsubu.v4i16(<4 x i16>, <4 x i16>) nounwind readnone
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154 declare <2 x i32> @llvm.arm.neon.vqsubu.v2i32(<2 x i32>, <2 x i32>) nounwind readnone
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parents:
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155 declare <1 x i64> @llvm.arm.neon.vqsubu.v1i64(<1 x i64>, <1 x i64>) nounwind readnone
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parents:
diff changeset
156
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157 declare <16 x i8> @llvm.arm.neon.vqsubs.v16i8(<16 x i8>, <16 x i8>) nounwind readnone
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diff changeset
158 declare <8 x i16> @llvm.arm.neon.vqsubs.v8i16(<8 x i16>, <8 x i16>) nounwind readnone
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diff changeset
159 declare <4 x i32> @llvm.arm.neon.vqsubs.v4i32(<4 x i32>, <4 x i32>) nounwind readnone
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parents:
diff changeset
160 declare <2 x i64> @llvm.arm.neon.vqsubs.v2i64(<2 x i64>, <2 x i64>) nounwind readnone
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parents:
diff changeset
161
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diff changeset
162 declare <16 x i8> @llvm.arm.neon.vqsubu.v16i8(<16 x i8>, <16 x i8>) nounwind readnone
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parents:
diff changeset
163 declare <8 x i16> @llvm.arm.neon.vqsubu.v8i16(<8 x i16>, <8 x i16>) nounwind readnone
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parents:
diff changeset
164 declare <4 x i32> @llvm.arm.neon.vqsubu.v4i32(<4 x i32>, <4 x i32>) nounwind readnone
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
165 declare <2 x i64> @llvm.arm.neon.vqsubu.v2i64(<2 x i64>, <2 x i64>) nounwind readnone