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annotate test/CodeGen/Hexagon/circ_ldw.ll @ 128:c347d3398279 default tip

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fix
author mir3636
date Wed, 06 Dec 2017 14:37:17 +0900
parents 803732b1fca8
children
Ignore whitespace changes - Everywhere: Within whitespace: At end of lines:
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95
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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1 ; RUN: llc -march=hexagon -mcpu=hexagonv5 < %s | FileCheck %s
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803732b1fca8 LLVM 5.0
kono
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2 ; CHECK: r{{[0-9]*}} = memw(r{{[0-9]*}}++#-4:circ(m0))
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3
afa8332a0e37 LLVM 3.8
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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5 %union.vect64 = type { i64 }
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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6 %union.vect32 = type { i32 }
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7
afa8332a0e37 LLVM 3.8
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8 define i32* @HallowedBeThyName(%union.vect64* nocapture %pRx, %union.vect32* %pLut, %union.vect64* nocapture %pOut, i64 %dc.coerce, i32 %shift, i32 %numSamples) nounwind {
afa8332a0e37 LLVM 3.8
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9 entry:
afa8332a0e37 LLVM 3.8
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10 %vLutNext = alloca i32, align 4
afa8332a0e37 LLVM 3.8
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11 %0 = bitcast %union.vect32* %pLut to i8*
afa8332a0e37 LLVM 3.8
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12 %1 = bitcast i32* %vLutNext to i8*
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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13 %2 = call i8* @llvm.hexagon.circ.ldw(i8* %0, i8* %1, i32 83886144, i32 -4)
afa8332a0e37 LLVM 3.8
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14 %3 = bitcast i8* %2 to i32*
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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15 ret i32* %3
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16 }
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afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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18 declare i8* @llvm.hexagon.circ.ldw(i8*, i8*, i32, i32) nounwind