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annotate test/CodeGen/Hexagon/vec-vararg-align.ll @ 128:c347d3398279 default tip

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fix
author mir3636
date Wed, 06 Dec 2017 14:37:17 +0900
parents 803732b1fca8
children
Ignore whitespace changes - Everywhere: Within whitespace: At end of lines:
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121
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1 ; RUN: llc -march=hexagon < %s | FileCheck %s
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2 ;
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3 ; Check that the stack is aligned according to the outgoing function arguments.
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4 ; CHECK: r29 = and(r29,#-128)
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5
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6 target triple = "hexagon-unknown--elf"
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7
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8 @.str = private unnamed_addr constant [32 x i8] c"\0AMixed Vectors, Pairs, int flt\0A\00", align 1
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9 @.str.1 = private unnamed_addr constant [11 x i8] c"\0AVar args\0A\00", align 1
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10 @gVec0 = common global <16 x i32> zeroinitializer, align 64
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11 @gVec10 = common global <32 x i32> zeroinitializer, align 128
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12 @gi1 = common global i32 0, align 4
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13 @gf1 = common global float 0.000000e+00, align 4
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14
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15 define i32 @main() #0 {
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16 b0:
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17 %v1 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([32 x i8], [32 x i8]* @.str, i32 0, i32 0)) #0
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18 %v2 = load <16 x i32>, <16 x i32>* @gVec0, align 64
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19 %v3 = load <32 x i32>, <32 x i32>* @gVec10, align 128
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20 %v4 = load i32, i32* @gi1, align 4
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21 %v5 = load float, float* @gf1, align 4
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22 %v6 = fpext float %v5 to double
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23 call void (i8*, i32, ...) @VarVec1(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str.1, i32 0, i32 0), i32 4, <16 x i32> %v2, <32 x i32> %v3, i32 %v4, double %v6)
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24 ret i32 0
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25 }
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26
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27 declare i32 @printf(i8*, ...) #0
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28 declare void @VarVec1(i8*, i32, ...) #0
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29
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30 attributes #0 = { nounwind "target-cpu"="hexagonv60" "target-features"="+hvxv60,+hvx-length64b" }