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comparison test/CodeGen/AMDGPU/select-i1.ll @ 120:1172e4bd9c6f

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update 4.0.0
author mir3636
date Fri, 25 Nov 2016 19:14:25 +0900
parents afa8332a0e37
children 803732b1fca8
comparison
equal deleted inserted replaced
101:34baf5011add 120:1172e4bd9c6f
1 ; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s 1 ; RUN: llc -march=amdgcn -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
2 ; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s 2 ; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
3 3
4 ; FIXME: This should go in existing select.ll test, except the current testcase there is broken on SI 4 ; FIXME: This should go in existing select.ll test, except the current testcase there is broken on SI
5 5
6 ; FUNC-LABEL: {{^}}select_i1: 6 ; FUNC-LABEL: {{^}}select_i1:
11 %sel = select i1 %cmp, i1 %a, i1 %b 11 %sel = select i1 %cmp, i1 %a, i1 %b
12 store i1 %sel, i1 addrspace(1)* %out, align 4 12 store i1 %sel, i1 addrspace(1)* %out, align 4
13 ret void 13 ret void
14 } 14 }
15 15
16 ; FUNC-LABEL: {{^}}s_minmax_i1:
17 ; SI-DAG: buffer_load_ubyte [[COND:v[0-9]+]], off, s{{\[[0-9]+:[0-9]+\]}}, 0 offset:44
18 ; SI-DAG: buffer_load_ubyte [[A:v[0-9]+]], off, s{{\[[0-9]+:[0-9]+\]}}, 0 offset:45
19 ; SI-DAG: buffer_load_ubyte [[B:v[0-9]+]], off, s{{\[[0-9]+:[0-9]+\]}}, 0 offset:46
20 ; SI: v_cmp_eq_u32_e32 vcc, 1, [[COND]]
21 ; SI: v_cndmask_b32_e32 v{{[0-9]+}}, [[B]], [[A]]
22 define void @s_minmax_i1(i1 addrspace(1)* %out, i1 zeroext %cond, i1 zeroext %a, i1 zeroext %b) nounwind {
23 %cmp = icmp slt i1 %cond, false
24 %sel = select i1 %cmp, i1 %a, i1 %b
25 store i1 %sel, i1 addrspace(1)* %out, align 4
26 ret void
27 }