Mercurial > hg > Members > tobaru > cbc > CbC_llvm
comparison lib/CodeGen/VirtRegMap.cpp @ 77:54457678186b
LLVM 3.6
author | Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> |
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date | Mon, 08 Sep 2014 22:06:00 +0900 |
parents | 95c75e76d11b |
children | 60c9769439b8 |
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34:e874dbf0ad9d | 77:54457678186b |
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14 // references by replacing them with physical register references - adding spill | 14 // references by replacing them with physical register references - adding spill |
15 // code as necessary. | 15 // code as necessary. |
16 // | 16 // |
17 //===----------------------------------------------------------------------===// | 17 //===----------------------------------------------------------------------===// |
18 | 18 |
19 #define DEBUG_TYPE "regalloc" | |
20 #include "llvm/CodeGen/VirtRegMap.h" | 19 #include "llvm/CodeGen/VirtRegMap.h" |
21 #include "LiveDebugVariables.h" | 20 #include "LiveDebugVariables.h" |
22 #include "llvm/ADT/STLExtras.h" | 21 #include "llvm/ADT/STLExtras.h" |
22 #include "llvm/ADT/SparseSet.h" | |
23 #include "llvm/ADT/Statistic.h" | 23 #include "llvm/ADT/Statistic.h" |
24 #include "llvm/CodeGen/LiveIntervalAnalysis.h" | 24 #include "llvm/CodeGen/LiveIntervalAnalysis.h" |
25 #include "llvm/CodeGen/LiveStackAnalysis.h" | 25 #include "llvm/CodeGen/LiveStackAnalysis.h" |
26 #include "llvm/CodeGen/MachineFrameInfo.h" | 26 #include "llvm/CodeGen/MachineFrameInfo.h" |
27 #include "llvm/CodeGen/MachineFunction.h" | 27 #include "llvm/CodeGen/MachineFunction.h" |
34 #include "llvm/Support/Debug.h" | 34 #include "llvm/Support/Debug.h" |
35 #include "llvm/Support/raw_ostream.h" | 35 #include "llvm/Support/raw_ostream.h" |
36 #include "llvm/Target/TargetInstrInfo.h" | 36 #include "llvm/Target/TargetInstrInfo.h" |
37 #include "llvm/Target/TargetMachine.h" | 37 #include "llvm/Target/TargetMachine.h" |
38 #include "llvm/Target/TargetRegisterInfo.h" | 38 #include "llvm/Target/TargetRegisterInfo.h" |
39 #include "llvm/Target/TargetSubtargetInfo.h" | |
39 #include <algorithm> | 40 #include <algorithm> |
40 using namespace llvm; | 41 using namespace llvm; |
41 | 42 |
43 #define DEBUG_TYPE "regalloc" | |
44 | |
42 STATISTIC(NumSpillSlots, "Number of spill slots allocated"); | 45 STATISTIC(NumSpillSlots, "Number of spill slots allocated"); |
43 STATISTIC(NumIdCopies, "Number of identity moves eliminated after rewriting"); | 46 STATISTIC(NumIdCopies, "Number of identity moves eliminated after rewriting"); |
44 | 47 |
45 //===----------------------------------------------------------------------===// | 48 //===----------------------------------------------------------------------===// |
46 // VirtRegMap implementation | 49 // VirtRegMap implementation |
50 | 53 |
51 INITIALIZE_PASS(VirtRegMap, "virtregmap", "Virtual Register Map", false, false) | 54 INITIALIZE_PASS(VirtRegMap, "virtregmap", "Virtual Register Map", false, false) |
52 | 55 |
53 bool VirtRegMap::runOnMachineFunction(MachineFunction &mf) { | 56 bool VirtRegMap::runOnMachineFunction(MachineFunction &mf) { |
54 MRI = &mf.getRegInfo(); | 57 MRI = &mf.getRegInfo(); |
55 TII = mf.getTarget().getInstrInfo(); | 58 TII = mf.getSubtarget().getInstrInfo(); |
56 TRI = mf.getTarget().getRegisterInfo(); | 59 TRI = mf.getSubtarget().getRegisterInfo(); |
57 MF = &mf; | 60 MF = &mf; |
58 | 61 |
59 Virt2PhysMap.clear(); | 62 Virt2PhysMap.clear(); |
60 Virt2StackSlotMap.clear(); | 63 Virt2StackSlotMap.clear(); |
61 Virt2SplitMap.clear(); | 64 Virt2SplitMap.clear(); |
158 const TargetInstrInfo *TII; | 161 const TargetInstrInfo *TII; |
159 MachineRegisterInfo *MRI; | 162 MachineRegisterInfo *MRI; |
160 SlotIndexes *Indexes; | 163 SlotIndexes *Indexes; |
161 LiveIntervals *LIS; | 164 LiveIntervals *LIS; |
162 VirtRegMap *VRM; | 165 VirtRegMap *VRM; |
166 SparseSet<unsigned> PhysRegs; | |
163 | 167 |
164 void rewrite(); | 168 void rewrite(); |
165 void addMBBLiveIns(); | 169 void addMBBLiveIns(); |
166 public: | 170 public: |
167 static char ID; | 171 static char ID; |
168 VirtRegRewriter() : MachineFunctionPass(ID) {} | 172 VirtRegRewriter() : MachineFunctionPass(ID) {} |
169 | 173 |
170 virtual void getAnalysisUsage(AnalysisUsage &AU) const; | 174 void getAnalysisUsage(AnalysisUsage &AU) const override; |
171 | 175 |
172 virtual bool runOnMachineFunction(MachineFunction&); | 176 bool runOnMachineFunction(MachineFunction&) override; |
173 }; | 177 }; |
174 } // end anonymous namespace | 178 } // end anonymous namespace |
175 | 179 |
176 char &llvm::VirtRegRewriterID = VirtRegRewriter::ID; | 180 char &llvm::VirtRegRewriterID = VirtRegRewriter::ID; |
177 | 181 |
200 } | 204 } |
201 | 205 |
202 bool VirtRegRewriter::runOnMachineFunction(MachineFunction &fn) { | 206 bool VirtRegRewriter::runOnMachineFunction(MachineFunction &fn) { |
203 MF = &fn; | 207 MF = &fn; |
204 TM = &MF->getTarget(); | 208 TM = &MF->getTarget(); |
205 TRI = TM->getRegisterInfo(); | 209 TRI = TM->getSubtargetImpl()->getRegisterInfo(); |
206 TII = TM->getInstrInfo(); | 210 TII = TM->getSubtargetImpl()->getInstrInfo(); |
207 MRI = &MF->getRegInfo(); | 211 MRI = &MF->getRegInfo(); |
208 Indexes = &getAnalysis<SlotIndexes>(); | 212 Indexes = &getAnalysis<SlotIndexes>(); |
209 LIS = &getAnalysis<LiveIntervals>(); | 213 LIS = &getAnalysis<LiveIntervals>(); |
210 VRM = &getAnalysis<VirtRegMap>(); | 214 VRM = &getAnalysis<VirtRegMap>(); |
211 DEBUG(dbgs() << "********** REWRITE VIRTUAL REGISTERS **********\n" | 215 DEBUG(dbgs() << "********** REWRITE VIRTUAL REGISTERS **********\n" |
265 SmallVector<unsigned, 8> SuperDeads; | 269 SmallVector<unsigned, 8> SuperDeads; |
266 SmallVector<unsigned, 8> SuperDefs; | 270 SmallVector<unsigned, 8> SuperDefs; |
267 SmallVector<unsigned, 8> SuperKills; | 271 SmallVector<unsigned, 8> SuperKills; |
268 SmallPtrSet<const MachineInstr *, 4> NoReturnInsts; | 272 SmallPtrSet<const MachineInstr *, 4> NoReturnInsts; |
269 | 273 |
274 // Here we have a SparseSet to hold which PhysRegs are actually encountered | |
275 // in the MF we are about to iterate over so that later when we call | |
276 // setPhysRegUsed, we are only doing it for physRegs that were actually found | |
277 // in the program and not for all of the possible physRegs for the given | |
278 // target architecture. If the target has a lot of physRegs, then for a small | |
279 // program there will be a significant compile time reduction here. | |
280 PhysRegs.clear(); | |
281 PhysRegs.setUniverse(TRI->getNumRegs()); | |
282 | |
283 // The function with uwtable should guarantee that the stack unwinder | |
284 // can unwind the stack to the previous frame. Thus, we can't apply the | |
285 // noreturn optimization if the caller function has uwtable attribute. | |
286 bool HasUWTable = MF->getFunction()->hasFnAttribute(Attribute::UWTable); | |
287 | |
270 for (MachineFunction::iterator MBBI = MF->begin(), MBBE = MF->end(); | 288 for (MachineFunction::iterator MBBI = MF->begin(), MBBE = MF->end(); |
271 MBBI != MBBE; ++MBBI) { | 289 MBBI != MBBE; ++MBBI) { |
272 DEBUG(MBBI->print(dbgs(), Indexes)); | 290 DEBUG(MBBI->print(dbgs(), Indexes)); |
273 bool IsExitBB = MBBI->succ_empty(); | 291 bool IsExitBB = MBBI->succ_empty(); |
274 for (MachineBasicBlock::instr_iterator | 292 for (MachineBasicBlock::instr_iterator |
275 MII = MBBI->instr_begin(), MIE = MBBI->instr_end(); MII != MIE;) { | 293 MII = MBBI->instr_begin(), MIE = MBBI->instr_end(); MII != MIE;) { |
276 MachineInstr *MI = MII; | 294 MachineInstr *MI = MII; |
277 ++MII; | 295 ++MII; |
278 | 296 |
279 // Check if this instruction is a call to a noreturn function. | 297 // Check if this instruction is a call to a noreturn function. If this |
280 // If so, all the definitions set by this instruction can be ignored. | 298 // is a call to noreturn function and we don't need the stack unwinding |
281 if (IsExitBB && MI->isCall()) | 299 // functionality (i.e. this function does not have uwtable attribute and |
300 // the callee function has the nounwind attribute), then we can ignore | |
301 // the definitions set by this instruction. | |
302 if (!HasUWTable && IsExitBB && MI->isCall()) { | |
282 for (MachineInstr::mop_iterator MOI = MI->operands_begin(), | 303 for (MachineInstr::mop_iterator MOI = MI->operands_begin(), |
283 MOE = MI->operands_end(); MOI != MOE; ++MOI) { | 304 MOE = MI->operands_end(); MOI != MOE; ++MOI) { |
284 MachineOperand &MO = *MOI; | 305 MachineOperand &MO = *MOI; |
285 if (!MO.isGlobal()) | 306 if (!MO.isGlobal()) |
286 continue; | 307 continue; |
292 !Func->hasFnAttribute(Attribute::NoUnwind)) | 313 !Func->hasFnAttribute(Attribute::NoUnwind)) |
293 continue; | 314 continue; |
294 NoReturnInsts.insert(MI); | 315 NoReturnInsts.insert(MI); |
295 break; | 316 break; |
296 } | 317 } |
318 } | |
297 | 319 |
298 for (MachineInstr::mop_iterator MOI = MI->operands_begin(), | 320 for (MachineInstr::mop_iterator MOI = MI->operands_begin(), |
299 MOE = MI->operands_end(); MOI != MOE; ++MOI) { | 321 MOE = MI->operands_end(); MOI != MOE; ++MOI) { |
300 MachineOperand &MO = *MOI; | 322 MachineOperand &MO = *MOI; |
301 | 323 |
302 // Make sure MRI knows about registers clobbered by regmasks. | 324 // Make sure MRI knows about registers clobbered by regmasks. |
303 if (MO.isRegMask()) | 325 if (MO.isRegMask()) |
304 MRI->addPhysRegsUsedFromRegMask(MO.getRegMask()); | 326 MRI->addPhysRegsUsedFromRegMask(MO.getRegMask()); |
327 | |
328 // If we encounter a VirtReg or PhysReg then get at the PhysReg and add | |
329 // it to the physreg bitset. Later we use only the PhysRegs that were | |
330 // actually encountered in the MF to populate the MRI's used physregs. | |
331 if (MO.isReg() && MO.getReg()) | |
332 PhysRegs.insert( | |
333 TargetRegisterInfo::isVirtualRegister(MO.getReg()) ? | |
334 VRM->getPhys(MO.getReg()) : | |
335 MO.getReg()); | |
305 | 336 |
306 if (!MO.isReg() || !TargetRegisterInfo::isVirtualRegister(MO.getReg())) | 337 if (!MO.isReg() || !TargetRegisterInfo::isVirtualRegister(MO.getReg())) |
307 continue; | 338 continue; |
308 unsigned VirtReg = MO.getReg(); | 339 unsigned VirtReg = MO.getReg(); |
309 unsigned PhysReg = VRM->getPhys(VirtReg); | 340 unsigned PhysReg = VRM->getPhys(VirtReg); |
374 } | 405 } |
375 } | 406 } |
376 | 407 |
377 // Tell MRI about physical registers in use. | 408 // Tell MRI about physical registers in use. |
378 if (NoReturnInsts.empty()) { | 409 if (NoReturnInsts.empty()) { |
379 for (unsigned Reg = 1, RegE = TRI->getNumRegs(); Reg != RegE; ++Reg) | 410 for (SparseSet<unsigned>::iterator |
380 if (!MRI->reg_nodbg_empty(Reg)) | 411 RegI = PhysRegs.begin(), E = PhysRegs.end(); RegI != E; ++RegI) |
381 MRI->setPhysRegUsed(Reg); | 412 if (!MRI->reg_nodbg_empty(*RegI)) |
413 MRI->setPhysRegUsed(*RegI); | |
382 } else { | 414 } else { |
383 for (unsigned Reg = 1, RegE = TRI->getNumRegs(); Reg != RegE; ++Reg) { | 415 for (SparseSet<unsigned>::iterator |
416 I = PhysRegs.begin(), E = PhysRegs.end(); I != E; ++I) { | |
417 unsigned Reg = *I; | |
384 if (MRI->reg_nodbg_empty(Reg)) | 418 if (MRI->reg_nodbg_empty(Reg)) |
385 continue; | 419 continue; |
386 // Check if this register has a use that will impact the rest of the | 420 // Check if this register has a use that will impact the rest of the |
387 // code. Uses in debug and noreturn instructions do not impact the | 421 // code. Uses in debug and noreturn instructions do not impact the |
388 // generated code. | 422 // generated code. |
389 for (MachineRegisterInfo::reg_nodbg_iterator It = | 423 for (MachineInstr &It : MRI->reg_nodbg_instructions(Reg)) { |
390 MRI->reg_nodbg_begin(Reg), | 424 if (!NoReturnInsts.count(&It)) { |
391 EndIt = MRI->reg_nodbg_end(); It != EndIt; ++It) { | |
392 if (!NoReturnInsts.count(&(*It))) { | |
393 MRI->setPhysRegUsed(Reg); | 425 MRI->setPhysRegUsed(Reg); |
394 break; | 426 break; |
395 } | 427 } |
396 } | 428 } |
397 } | 429 } |
398 } | 430 } |
399 } | 431 } |
432 |