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comparison test/CodeGen/AArch64/arm64-AnInfiniteLoopInDAGCombine.ll @ 77:54457678186b

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LLVM 3.6
author Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
date Mon, 08 Sep 2014 22:06:00 +0900
parents
children 1172e4bd9c6f
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34:e874dbf0ad9d 77:54457678186b
1 ; RUN: llc < %s -march=arm64
2
3 ; This test case tests an infinite loop bug in DAG combiner.
4 ; It just tries to do the following replacing endlessly:
5 ; (1) Replacing.3 0x2c509f0: v4i32 = any_extend 0x2c4cd08 [ORD=4]
6 ; With: 0x2c4d128: v4i32 = sign_extend 0x2c4cd08 [ORD=4]
7 ;
8 ; (2) Replacing.2 0x2c4d128: v4i32 = sign_extend 0x2c4cd08 [ORD=4]
9 ; With: 0x2c509f0: v4i32 = any_extend 0x2c4cd08 [ORD=4]
10 ; As we think the (2) optimization from SIGN_EXTEND to ANY_EXTEND is
11 ; an optimization to replace unused bits with undefined bits, we remove
12 ; the (1) optimization (It doesn't make sense to replace undefined bits
13 ; with signed bits).
14
15 define <4 x i32> @infiniteLoop(<4 x i32> %in0, <4 x i16> %in1) {
16 entry:
17 %cmp.i = icmp sge <4 x i16> %in1, <i16 32767, i16 32767, i16 -1, i16 -32768>
18 %sext.i = sext <4 x i1> %cmp.i to <4 x i32>
19 %mul.i = mul <4 x i32> %in0, %sext.i
20 %sext = shl <4 x i32> %mul.i, <i32 16, i32 16, i32 16, i32 16>
21 %vmovl.i.i = ashr <4 x i32> %sext, <i32 16, i32 16, i32 16, i32 16>
22 ret <4 x i32> %vmovl.i.i
23 }