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comparison test/CodeGen/PowerPC/vec_cmp.ll @ 77:54457678186b

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LLVM 3.6
author Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
date Mon, 08 Sep 2014 22:06:00 +0900
parents e4204d083e25
children 1172e4bd9c6f
comparison
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34:e874dbf0ad9d 77:54457678186b
34 } 34 }
35 ; CHECK-LABEL: v8si8_cmp: 35 ; CHECK-LABEL: v8si8_cmp:
36 ; CHECK: vcmpequh {{[0-9]+}}, {{[0-9]+}}, {{[0-9]+}} 36 ; CHECK: vcmpequh {{[0-9]+}}, {{[0-9]+}}, {{[0-9]+}}
37 37
38 38
39 ; Adicional tests for v16i8 since it is a altivec native type 39 ; Additional tests for v16i8 since it is a altivec native type
40 40
41 define <16 x i8> @v16si8_cmp_eq(<16 x i8> %x, <16 x i8> %y) nounwind readnone { 41 define <16 x i8> @v16si8_cmp_eq(<16 x i8> %x, <16 x i8> %y) nounwind readnone {
42 %cmp = icmp eq <16 x i8> %x, %y 42 %cmp = icmp eq <16 x i8> %x, %y
43 %sext = sext <16 x i1> %cmp to <16 x i8> 43 %sext = sext <16 x i1> %cmp to <16 x i8>
44 ret <16 x i8> %sext 44 ret <16 x i8> %sext
61 %cmp = icmp sle <16 x i8> %x, %y 61 %cmp = icmp sle <16 x i8> %x, %y
62 %sext = sext <16 x i1> %cmp to <16 x i8> 62 %sext = sext <16 x i1> %cmp to <16 x i8>
63 ret <16 x i8> %sext 63 ret <16 x i8> %sext
64 } 64 }
65 ; CHECK-LABEL: v16si8_cmp_le: 65 ; CHECK-LABEL: v16si8_cmp_le:
66 ; CHECK: vcmpequb [[RCMPEQ:[0-9]+]], 2, 3 66 ; CHECK: vcmpgtsb [[RET:[0-9]+]], 2, 3
67 ; CHECK-NEXT: vcmpgtsb [[RCMPLE:[0-9]+]], 3, 2 67 ; CHECK-NEXT: vnor 2, [[RET]], [[RET]]
68 ; CHECK-NEXT: vor 2, [[RCMPLE]], [[RCMPEQ]]
69 68
70 define <16 x i8> @v16ui8_cmp_le(<16 x i8> %x, <16 x i8> %y) nounwind readnone { 69 define <16 x i8> @v16ui8_cmp_le(<16 x i8> %x, <16 x i8> %y) nounwind readnone {
71 entry: 70 entry:
72 %cmp = icmp ule <16 x i8> %x, %y 71 %cmp = icmp ule <16 x i8> %x, %y
73 %sext = sext <16 x i1> %cmp to <16 x i8> 72 %sext = sext <16 x i1> %cmp to <16 x i8>
74 ret <16 x i8> %sext 73 ret <16 x i8> %sext
75 } 74 }
76 ; CHECK-LABEL: v16ui8_cmp_le: 75 ; CHECK-LABEL: v16ui8_cmp_le:
77 ; CHECK: vcmpequb [[RCMPEQ:[0-9]+]], 2, 3 76 ; CHECK: vcmpgtub [[RET:[0-9]+]], 2, 3
78 ; CHECK-NEXT: vcmpgtub [[RCMPLE:[0-9]+]], 3, 2 77 ; CHECK-NEXT: vnor 2, [[RET]], [[RET]]
79 ; CHECK-NEXT: vor 2, [[RCMPLE]], [[RCMPEQ]]
80 78
81 define <16 x i8> @v16si8_cmp_lt(<16 x i8> %x, <16 x i8> %y) nounwind readnone { 79 define <16 x i8> @v16si8_cmp_lt(<16 x i8> %x, <16 x i8> %y) nounwind readnone {
82 entry: 80 entry:
83 %cmp = icmp slt <16 x i8> %x, %y 81 %cmp = icmp slt <16 x i8> %x, %y
84 %sext = sext <16 x i1> %cmp to <16 x i8> 82 %sext = sext <16 x i1> %cmp to <16 x i8>
119 %cmp = icmp sge <16 x i8> %x, %y 117 %cmp = icmp sge <16 x i8> %x, %y
120 %sext = sext <16 x i1> %cmp to <16 x i8> 118 %sext = sext <16 x i1> %cmp to <16 x i8>
121 ret <16 x i8> %sext 119 ret <16 x i8> %sext
122 } 120 }
123 ; CHECK-LABEL: v16si8_cmp_ge: 121 ; CHECK-LABEL: v16si8_cmp_ge:
124 ; CHECK: vcmpequb [[RCMPEQ:[0-9]+]], 2, 3 122 ; CHECK: vcmpgtsb [[RET:[0-9]+]], 3, 2
125 ; CHECK-NEXT: vcmpgtsb [[RCMPGT:[0-9]+]], 2, 3 123 ; CHECK-NEXT: vnor 2, [[RET]], [[RET]]
126 ; CHECK-NEXT: vor 2, [[RCMPGT]], [[RCMPEQ]]
127 124
128 define <16 x i8> @v16ui8_cmp_ge(<16 x i8> %x, <16 x i8> %y) nounwind readnone { 125 define <16 x i8> @v16ui8_cmp_ge(<16 x i8> %x, <16 x i8> %y) nounwind readnone {
129 entry: 126 entry:
130 %cmp = icmp uge <16 x i8> %x, %y 127 %cmp = icmp uge <16 x i8> %x, %y
131 %sext = sext <16 x i1> %cmp to <16 x i8> 128 %sext = sext <16 x i1> %cmp to <16 x i8>
132 ret <16 x i8> %sext 129 ret <16 x i8> %sext
133 } 130 }
134 ; CHECK-LABEL: v16ui8_cmp_ge: 131 ; CHECK-LABEL: v16ui8_cmp_ge:
135 ; CHECK: vcmpequb [[RCMPEQ:[0-9]+]], 2, 3 132 ; CHECK: vcmpgtub [[RET:[0-9]+]], 3, 2
136 ; CHECK-NEXT: vcmpgtub [[RCMPGT:[0-9]+]], 2, 3 133 ; CHECK-NEXT: vnor 2, [[RET]], [[RET]]
137 ; CHECK-NEXT: vor 2, [[RCMPGT]], [[RCMPEQ]]
138 134
139 135
140 define <32 x i8> @v32si8_cmp(<32 x i8> %x, <32 x i8> %y) nounwind readnone { 136 define <32 x i8> @v32si8_cmp(<32 x i8> %x, <32 x i8> %y) nounwind readnone {
141 %cmp = icmp eq <32 x i8> %x, %y 137 %cmp = icmp eq <32 x i8> %x, %y
142 %sext = sext <32 x i1> %cmp to <32 x i8> 138 %sext = sext <32 x i1> %cmp to <32 x i8>
163 } 159 }
164 ; CHECK-LABEL: v4si16_cmp: 160 ; CHECK-LABEL: v4si16_cmp:
165 ; CHECK: vcmpequw {{[0-9]+}}, {{[0-9]+}}, {{[0-9]+}} 161 ; CHECK: vcmpequw {{[0-9]+}}, {{[0-9]+}}, {{[0-9]+}}
166 162
167 163
168 ; Adicional tests for v8i16 since it is an altivec native type 164 ; Additional tests for v8i16 since it is an altivec native type
169 165
170 define <8 x i16> @v8si16_cmp_eq(<8 x i16> %x, <8 x i16> %y) nounwind readnone { 166 define <8 x i16> @v8si16_cmp_eq(<8 x i16> %x, <8 x i16> %y) nounwind readnone {
171 entry: 167 entry:
172 %cmp = icmp eq <8 x i16> %x, %y 168 %cmp = icmp eq <8 x i16> %x, %y
173 %sext = sext <8 x i1> %cmp to <8 x i16> 169 %sext = sext <8 x i1> %cmp to <8 x i16>
191 %cmp = icmp sle <8 x i16> %x, %y 187 %cmp = icmp sle <8 x i16> %x, %y
192 %sext = sext <8 x i1> %cmp to <8 x i16> 188 %sext = sext <8 x i1> %cmp to <8 x i16>
193 ret <8 x i16> %sext 189 ret <8 x i16> %sext
194 } 190 }
195 ; CHECK-LABEL: v8si16_cmp_le: 191 ; CHECK-LABEL: v8si16_cmp_le:
196 ; CHECK: vcmpequh [[RCMPEQ:[0-9]+]], 2, 3 192 ; CHECK: vcmpgtsh [[RET:[0-9]+]], 2, 3
197 ; CHECK-NEXT: vcmpgtsh [[RCMPLE:[0-9]+]], 3, 2 193 ; CHECK-NEXT: vnor 2, [[RET]], [[RET]]
198 ; CHECK-NEXT: vor 2, [[RCMPLE]], [[RCMPEQ]]
199 194
200 define <8 x i16> @v8ui16_cmp_le(<8 x i16> %x, <8 x i16> %y) nounwind readnone { 195 define <8 x i16> @v8ui16_cmp_le(<8 x i16> %x, <8 x i16> %y) nounwind readnone {
201 entry: 196 entry:
202 %cmp = icmp ule <8 x i16> %x, %y 197 %cmp = icmp ule <8 x i16> %x, %y
203 %sext = sext <8 x i1> %cmp to <8 x i16> 198 %sext = sext <8 x i1> %cmp to <8 x i16>
204 ret <8 x i16> %sext 199 ret <8 x i16> %sext
205 } 200 }
206 ; CHECK-LABEL: v8ui16_cmp_le: 201 ; CHECK-LABEL: v8ui16_cmp_le:
207 ; CHECK: vcmpequh [[RCMPEQ:[0-9]+]], 2, 3 202 ; CHECK: vcmpgtuh [[RET:[0-9]+]], 2, 3
208 ; CHECK-NEXT: vcmpgtuh [[RCMPLE:[0-9]+]], 3, 2 203 ; CHECK-NEXT: vnor 2, [[RET]], [[RET]]
209 ; CHECK-NEXT: vor 2, [[RCMPLE]], [[RCMPEQ]]
210 204
211 define <8 x i16> @v8si16_cmp_lt(<8 x i16> %x, <8 x i16> %y) nounwind readnone { 205 define <8 x i16> @v8si16_cmp_lt(<8 x i16> %x, <8 x i16> %y) nounwind readnone {
212 entry: 206 entry:
213 %cmp = icmp slt <8 x i16> %x, %y 207 %cmp = icmp slt <8 x i16> %x, %y
214 %sext = sext <8 x i1> %cmp to <8 x i16> 208 %sext = sext <8 x i1> %cmp to <8 x i16>
249 %cmp = icmp sge <8 x i16> %x, %y 243 %cmp = icmp sge <8 x i16> %x, %y
250 %sext = sext <8 x i1> %cmp to <8 x i16> 244 %sext = sext <8 x i1> %cmp to <8 x i16>
251 ret <8 x i16> %sext 245 ret <8 x i16> %sext
252 } 246 }
253 ; CHECK-LABEL: v8si16_cmp_ge: 247 ; CHECK-LABEL: v8si16_cmp_ge:
254 ; CHECK: vcmpequh [[RCMPEQ:[0-9]+]], 2, 3 248 ; CHECK: vcmpgtsh [[RET:[0-9]+]], 3, 2
255 ; CHECK-NEXT: vcmpgtsh [[RCMPGT:[0-9]+]], 2, 3 249 ; CHECK-NEXT: vnor 2, [[RET]], [[RET]]
256 ; CHECK-NEXT: vor 2, [[RCMPGT]], [[RCMPEQ]]
257 250
258 define <8 x i16> @v8ui16_cmp_ge(<8 x i16> %x, <8 x i16> %y) nounwind readnone { 251 define <8 x i16> @v8ui16_cmp_ge(<8 x i16> %x, <8 x i16> %y) nounwind readnone {
259 entry: 252 entry:
260 %cmp = icmp uge <8 x i16> %x, %y 253 %cmp = icmp uge <8 x i16> %x, %y
261 %sext = sext <8 x i1> %cmp to <8 x i16> 254 %sext = sext <8 x i1> %cmp to <8 x i16>
262 ret <8 x i16> %sext 255 ret <8 x i16> %sext
263 } 256 }
264 ; CHECK-LABEL: v8ui16_cmp_ge: 257 ; CHECK-LABEL: v8ui16_cmp_ge:
265 ; CHECK: vcmpequh [[RCMPEQ:[0-9]+]], 2, 3 258 ; CHECK: vcmpgtuh [[RET:[0-9]+]], 3, 2
266 ; CHECK-NEXT: vcmpgtuh [[RCMPGT:[0-9]+]], 2, 3 259 ; CHECK-NEXT: vnor 2, [[RET]], [[RET]]
267 ; CHECK-NEXT: vor 2, [[RCMPGT]], [[RCMPEQ]]
268 260
269 261
270 define <16 x i16> @v16si16_cmp(<16 x i16> %x, <16 x i16> %y) nounwind readnone { 262 define <16 x i16> @v16si16_cmp(<16 x i16> %x, <16 x i16> %y) nounwind readnone {
271 %cmp = icmp eq <16 x i16> %x, %y 263 %cmp = icmp eq <16 x i16> %x, %y
272 %sext = sext <16 x i1> %cmp to <16 x i16> 264 %sext = sext <16 x i1> %cmp to <16 x i16>
296 } 288 }
297 ; CHECK-LABEL: v2si32_cmp: 289 ; CHECK-LABEL: v2si32_cmp:
298 ; CHECK: vcmpequw {{[0-9]+}}, {{[0-9]+}}, {{[0-9]+}} 290 ; CHECK: vcmpequw {{[0-9]+}}, {{[0-9]+}}, {{[0-9]+}}
299 291
300 292
301 ; Adicional tests for v4si32 since it is an altivec native type 293 ; Additional tests for v4si32 since it is an altivec native type
302 294
303 define <4 x i32> @v4si32_cmp_eq(<4 x i32> %x, <4 x i32> %y) nounwind readnone { 295 define <4 x i32> @v4si32_cmp_eq(<4 x i32> %x, <4 x i32> %y) nounwind readnone {
304 entry: 296 entry:
305 %cmp = icmp eq <4 x i32> %x, %y 297 %cmp = icmp eq <4 x i32> %x, %y
306 %sext = sext <4 x i1> %cmp to <4 x i32> 298 %sext = sext <4 x i1> %cmp to <4 x i32>
324 %cmp = icmp sle <4 x i32> %x, %y 316 %cmp = icmp sle <4 x i32> %x, %y
325 %sext = sext <4 x i1> %cmp to <4 x i32> 317 %sext = sext <4 x i1> %cmp to <4 x i32>
326 ret <4 x i32> %sext 318 ret <4 x i32> %sext
327 } 319 }
328 ; CHECK-LABEL: v4si32_cmp_le: 320 ; CHECK-LABEL: v4si32_cmp_le:
329 ; CHECK: vcmpequw [[RCMPEQ:[0-9]+]], 2, 3 321 ; CHECK: vcmpgtsw [[RET:[0-9]+]], 2, 3
330 ; CHECK-NEXT: vcmpgtsw [[RCMPLE:[0-9]+]], 3, 2 322 ; CHECK-NEXT: vnor 2, [[RET]], [[RET]]
331 ; CHECK-NEXT: vor 2, [[RCMPLE]], [[RCMPEQ]]
332 323
333 define <4 x i32> @v4ui32_cmp_le(<4 x i32> %x, <4 x i32> %y) nounwind readnone { 324 define <4 x i32> @v4ui32_cmp_le(<4 x i32> %x, <4 x i32> %y) nounwind readnone {
334 entry: 325 entry:
335 %cmp = icmp ule <4 x i32> %x, %y 326 %cmp = icmp ule <4 x i32> %x, %y
336 %sext = sext <4 x i1> %cmp to <4 x i32> 327 %sext = sext <4 x i1> %cmp to <4 x i32>
337 ret <4 x i32> %sext 328 ret <4 x i32> %sext
338 } 329 }
339 ; CHECK-LABEL: v4ui32_cmp_le: 330 ; CHECK-LABEL: v4ui32_cmp_le:
340 ; CHECK: vcmpequw [[RCMPEQ:[0-9]+]], 2, 3 331 ; CHECK: vcmpgtuw [[RET:[0-9]+]], 2, 3
341 ; CHECK-NEXT: vcmpgtuw [[RCMPLE:[0-9]+]], 3, 2 332 ; CHECK-NEXT: vnor 2, [[RET]], [[RET]]
342 ; CHECK-NEXT: vor 2, [[RCMPLE]], [[RCMPEQ]]
343 333
344 define <4 x i32> @v4si32_cmp_lt(<4 x i32> %x, <4 x i32> %y) nounwind readnone { 334 define <4 x i32> @v4si32_cmp_lt(<4 x i32> %x, <4 x i32> %y) nounwind readnone {
345 entry: 335 entry:
346 %cmp = icmp slt <4 x i32> %x, %y 336 %cmp = icmp slt <4 x i32> %x, %y
347 %sext = sext <4 x i1> %cmp to <4 x i32> 337 %sext = sext <4 x i1> %cmp to <4 x i32>
382 %cmp = icmp sge <4 x i32> %x, %y 372 %cmp = icmp sge <4 x i32> %x, %y
383 %sext = sext <4 x i1> %cmp to <4 x i32> 373 %sext = sext <4 x i1> %cmp to <4 x i32>
384 ret <4 x i32> %sext 374 ret <4 x i32> %sext
385 } 375 }
386 ; CHECK-LABEL: v4si32_cmp_ge: 376 ; CHECK-LABEL: v4si32_cmp_ge:
387 ; CHECK: vcmpequw [[RCMPEQ:[0-9]+]], 2, 3 377 ; CHECK: vcmpgtsw [[RET:[0-9]+]], 3, 2
388 ; CHECK-NEXT: vcmpgtsw [[RCMPGT:[0-9]+]], 2, 3 378 ; CHECK-NEXT: vnor 2, [[RET]], [[RET]]
389 ; CHECK-NEXT: vor 2, [[RCMPGT]], [[RCMPEQ]]
390 379
391 define <4 x i32> @v4ui32_cmp_ge(<4 x i32> %x, <4 x i32> %y) nounwind readnone { 380 define <4 x i32> @v4ui32_cmp_ge(<4 x i32> %x, <4 x i32> %y) nounwind readnone {
392 entry: 381 entry:
393 %cmp = icmp uge <4 x i32> %x, %y 382 %cmp = icmp uge <4 x i32> %x, %y
394 %sext = sext <4 x i1> %cmp to <4 x i32> 383 %sext = sext <4 x i1> %cmp to <4 x i32>
395 ret <4 x i32> %sext 384 ret <4 x i32> %sext
396 } 385 }
397 ; CHECK-LABEL: v4ui32_cmp_ge: 386 ; CHECK-LABEL: v4ui32_cmp_ge:
398 ; CHECK: vcmpequw [[RCMPEQ:[0-9]+]], 2, 3 387 ; CHECK: vcmpgtuw [[RET:[0-9]+]], 3, 2
399 ; CHECK-NEXT: vcmpgtuw [[RCMPGT:[0-9]+]], 2, 3 388 ; CHECK-NEXT: vnor 2, [[RET]], [[RET]]
400 ; CHECK-NEXT: vor 2, [[RCMPGT]], [[RCMPEQ]]
401 389
402 390
403 define <8 x i32> @v8si32_cmp(<8 x i32> %x, <8 x i32> %y) nounwind readnone { 391 define <8 x i32> @v8si32_cmp(<8 x i32> %x, <8 x i32> %y) nounwind readnone {
404 %cmp = icmp eq <8 x i32> %x, %y 392 %cmp = icmp eq <8 x i32> %x, %y
405 %sext = sext <8 x i1> %cmp to <8 x i32> 393 %sext = sext <8 x i1> %cmp to <8 x i32>
447 } 435 }
448 ; CHECK-LABEL: v2f32_cmp: 436 ; CHECK-LABEL: v2f32_cmp:
449 ; CHECK: vcmpeqfp {{[0-9]+}}, {{[0-9]+}}, {{[0-9]+}} 437 ; CHECK: vcmpeqfp {{[0-9]+}}, {{[0-9]+}}, {{[0-9]+}}
450 438
451 439
452 ; Adicional tests for v4f32 since it is a altivec native type 440 ; Additional tests for v4f32 since it is a altivec native type
453 441
454 define <4 x float> @v4f32_cmp_eq(<4 x float> %x, <4 x float> %y) nounwind readnone { 442 define <4 x float> @v4f32_cmp_eq(<4 x float> %x, <4 x float> %y) nounwind readnone {
455 entry: 443 entry:
456 %cmp = fcmp oeq <4 x float> %x, %y 444 %cmp = fcmp oeq <4 x float> %x, %y
457 %sext = sext <4 x i1> %cmp to <4 x i32> 445 %sext = sext <4 x i1> %cmp to <4 x i32>
478 %sext = sext <4 x i1> %cmp to <4 x i32> 466 %sext = sext <4 x i1> %cmp to <4 x i32>
479 %0 = bitcast <4 x i32> %sext to <4 x float> 467 %0 = bitcast <4 x i32> %sext to <4 x float>
480 ret <4 x float> %0 468 ret <4 x float> %0
481 } 469 }
482 ; CHECK-LABEL: v4f32_cmp_le: 470 ; CHECK-LABEL: v4f32_cmp_le:
483 ; CHECK: vcmpeqfp [[RCMPEQ:[0-9]+]], 2, 3 471 ; CHECK: vcmpgefp 2, 3, 2
484 ; CHECK-NEXT: vcmpgtfp [[RCMPLE:[0-9]+]], 3, 2
485 ; CHECK-NEXT: vor 2, [[RCMPLE]], [[RCMPEQ]]
486 472
487 define <4 x float> @v4f32_cmp_lt(<4 x float> %x, <4 x float> %y) nounwind readnone { 473 define <4 x float> @v4f32_cmp_lt(<4 x float> %x, <4 x float> %y) nounwind readnone {
488 entry: 474 entry:
489 %cmp = fcmp olt <4 x float> %x, %y 475 %cmp = fcmp olt <4 x float> %x, %y
490 %sext = sext <4 x i1> %cmp to <4 x i32> 476 %sext = sext <4 x i1> %cmp to <4 x i32>
511 %0 = bitcast <4 x i32> %sext to <4 x float> 497 %0 = bitcast <4 x i32> %sext to <4 x float>
512 ret <4 x float> %0 498 ret <4 x float> %0
513 } 499 }
514 ; CHECK-LABEL: v4f32_cmp_gt: 500 ; CHECK-LABEL: v4f32_cmp_gt:
515 ; CHECK: vcmpgtfp 2, 2, 3 501 ; CHECK: vcmpgtfp 2, 2, 3
502
503 define <4 x float> @v4f32_cmp_ule(<4 x float> %x, <4 x float> %y) nounwind readnone {
504 entry:
505 %cmp = fcmp ule <4 x float> %x, %y
506 %sext = sext <4 x i1> %cmp to <4 x i32>
507 %0 = bitcast <4 x i32> %sext to <4 x float>
508 ret <4 x float> %0
509 }
510 ; CHECK-LABEL: v4f32_cmp_ule:
511 ; CHECK: vcmpgtfp [[RET:[0-9]+]], 2, 3
512 ; CHECK-NEXT: vnor 2, [[RET]], [[RET]]
513
514 define <4 x float> @v4f32_cmp_ult(<4 x float> %x, <4 x float> %y) nounwind readnone {
515 entry:
516 %cmp = fcmp ult <4 x float> %x, %y
517 %sext = sext <4 x i1> %cmp to <4 x i32>
518 %0 = bitcast <4 x i32> %sext to <4 x float>
519 ret <4 x float> %0
520 }
521 ; CHECK-LABEL: v4f32_cmp_ult:
522 ; CHECK: vcmpgefp [[RET:[0-9]+]], 2, 3
523 ; CHECK-NEXT: vnor 2, [[RET]], [[RET]]
524
525 define <4 x float> @v4f32_cmp_uge(<4 x float> %x, <4 x float> %y) nounwind readnone {
526 entry:
527 %cmp = fcmp uge <4 x float> %x, %y
528 %sext = sext <4 x i1> %cmp to <4 x i32>
529 %0 = bitcast <4 x i32> %sext to <4 x float>
530 ret <4 x float> %0
531 }
532 ; CHECK-LABEL: v4f32_cmp_uge:
533 ; CHECK: vcmpgtfp [[RET:[0-9]+]], 3, 2
534 ; CHECK-NEXT: vnor 2, [[RET]], [[RET]]
535
536 define <4 x float> @v4f32_cmp_ugt(<4 x float> %x, <4 x float> %y) nounwind readnone {
537 entry:
538 %cmp = fcmp ugt <4 x float> %x, %y
539 %sext = sext <4 x i1> %cmp to <4 x i32>
540 %0 = bitcast <4 x i32> %sext to <4 x float>
541 ret <4 x float> %0
542 }
543 ; CHECK-LABEL: v4f32_cmp_ugt:
544 ; CHECK: vcmpgefp [[RET:[0-9]+]], 3, 2
545 ; CHECK-NEXT: vnor 2, [[RET]], [[RET]]
516 546
517 547
518 define <8 x float> @v8f32_cmp(<8 x float> %x, <8 x float> %y) nounwind readnone { 548 define <8 x float> @v8f32_cmp(<8 x float> %x, <8 x float> %y) nounwind readnone {
519 entry: 549 entry:
520 %cmp = fcmp oeq <8 x float> %x, %y 550 %cmp = fcmp oeq <8 x float> %x, %y