Mercurial > hg > Members > tobaru > cbc > CbC_llvm
comparison test/CodeGen/X86/misched-aa-mmos.ll @ 77:54457678186b
LLVM 3.6
| author | Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> |
|---|---|
| date | Mon, 08 Sep 2014 22:06:00 +0900 |
| parents | |
| children | afa8332a0e37 |
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| 34:e874dbf0ad9d | 77:54457678186b |
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| 1 ; RUN: llc -enable-misched -enable-aa-sched-mi < %s | |
| 2 | |
| 3 ; This generates a decw instruction, which has two MMOs, and an alias SU edge | |
| 4 ; query involving that instruction. Make sure this does not crash. | |
| 5 | |
| 6 target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128" | |
| 7 target triple = "x86_64-unknown-linux-gnu" | |
| 8 | |
| 9 %s1 = type { i16, i16, i32 } | |
| 10 %c1 = type { %s1*, %u1, i16, i8 } | |
| 11 %u1 = type { i64 } | |
| 12 | |
| 13 declare zeroext i1 @bar(i64*, i32) #5 | |
| 14 | |
| 15 define i32 @foo() #0 align 2 { | |
| 16 entry: | |
| 17 %temp_rhs = alloca %c1, align 8 | |
| 18 br i1 undef, label %if.else56, label %cond.end.i | |
| 19 | |
| 20 cond.end.i: | |
| 21 %significand.i18.i = getelementptr inbounds %c1* %temp_rhs, i64 0, i32 1 | |
| 22 %exponent.i = getelementptr inbounds %c1* %temp_rhs, i64 0, i32 2 | |
| 23 %0 = load i16* %exponent.i, align 8 | |
| 24 %sub.i = add i16 %0, -1 | |
| 25 store i16 %sub.i, i16* %exponent.i, align 8 | |
| 26 %parts.i.i = bitcast %u1* %significand.i18.i to i64** | |
| 27 %1 = load i64** %parts.i.i, align 8 | |
| 28 %call5.i = call zeroext i1 @bar(i64* %1, i32 undef) #1 | |
| 29 unreachable | |
| 30 | |
| 31 if.else56: | |
| 32 unreachable | |
| 33 } | |
| 34 | |
| 35 attributes #0 = { nounwind uwtable } | |
| 36 attributes #1 = { nounwind } | |
| 37 |