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comparison lib/Target/X86/X86.h @ 121:803732b1fca8

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LLVM 5.0
author kono
date Fri, 27 Oct 2017 17:07:41 +0900
parents 1172e4bd9c6f
children
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120:1172e4bd9c6f 121:803732b1fca8
19 19
20 namespace llvm { 20 namespace llvm {
21 21
22 class FunctionPass; 22 class FunctionPass;
23 class ImmutablePass; 23 class ImmutablePass;
24 class InstructionSelector;
24 class PassRegistry; 25 class PassRegistry;
26 class X86RegisterBankInfo;
27 class X86Subtarget;
25 class X86TargetMachine; 28 class X86TargetMachine;
26 29
27 /// This pass converts a legalized DAG into a X86-specific DAG, ready for 30 /// This pass converts a legalized DAG into a X86-specific DAG, ready for
28 /// instruction scheduling. 31 /// instruction scheduling.
29 FunctionPass *createX86ISelDag(X86TargetMachine &TM, 32 FunctionPass *createX86ISelDag(X86TargetMachine &TM,
78 /// instructions into a sequence of actual instructions. This pass 81 /// instructions into a sequence of actual instructions. This pass
79 /// must run after prologue/epilogue insertion and before lowering 82 /// must run after prologue/epilogue insertion and before lowering
80 /// the MachineInstr to MC. 83 /// the MachineInstr to MC.
81 FunctionPass *createX86ExpandPseudoPass(); 84 FunctionPass *createX86ExpandPseudoPass();
82 85
86 /// This pass converts X86 cmov instructions into branch when profitable.
87 FunctionPass *createX86CmovConverterPass();
88
83 /// Return a Machine IR pass that selectively replaces 89 /// Return a Machine IR pass that selectively replaces
84 /// certain byte and word instructions by equivalent 32 bit instructions, 90 /// certain byte and word instructions by equivalent 32 bit instructions,
85 /// in order to eliminate partial register usage, false dependences on 91 /// in order to eliminate partial register usage, false dependences on
86 /// the upper portions of registers, and to save code size. 92 /// the upper portions of registers, and to save code size.
87 FunctionPass *createX86FixupBWInsts(); 93 FunctionPass *createX86FixupBWInsts();
88 94
95 /// Return a Machine IR pass that reassigns instruction chains from one domain
96 /// to another, when profitable.
97 FunctionPass *createX86DomainReassignmentPass();
98
89 void initializeFixupBWInstPassPass(PassRegistry &); 99 void initializeFixupBWInstPassPass(PassRegistry &);
100
101 /// This pass replaces EVEX encoded of AVX-512 instructiosn by VEX
102 /// encoding when possible in order to reduce code size.
103 FunctionPass *createX86EvexToVexInsts();
104
105 InstructionSelector *createX86InstructionSelector(const X86TargetMachine &TM,
106 X86Subtarget &,
107 X86RegisterBankInfo &);
108
109 void initializeEvexToVexInstPassPass(PassRegistry &);
110
90 } // End llvm namespace 111 } // End llvm namespace
91 112
92 #endif 113 #endif