Members/tobaru/cbc/CbC_llvm: lib/Target/X86/X86FrameLowering.cpp comparison

comparison lib/Target/X86/X86FrameLowering.cpp @ 121:803732b1fca8

LLVM 5.0

author	kono
date	Fri, 27 Oct 2017 17:07:41 +0900
parents	1172e4bd9c6f
children

comparison

equal deleted inserted replaced

-:1172e4bd9c6f
+:803732b1fca8
 #include "llvm/CodeGen/WinEHFuncInfo.h"
 #include "llvm/IR/DataLayout.h"
 #include "llvm/IR/Function.h"
 #include "llvm/MC/MCAsmInfo.h"
 #include "llvm/MC/MCSymbol.h"
+#include "llvm/Support/Debug.h"
 #include "llvm/Target/TargetOptions.h"
-#include "llvm/Support/Debug.h"
 #include <cstdlib>
 using namespace llvm;
 X86FrameLowering::X86FrameLowering(const X86Subtarget &STI,
 /// hasFP - Return true if the specified function should have a dedicated frame
 /// pointer register.  This is true if the function has variable sized allocas
 /// or if frame pointer elimination is disabled.
 bool X86FrameLowering::hasFP(const MachineFunction &MF) const {
 const MachineFrameInfo &MFI = MF.getFrameInfo();
-const MachineModuleInfo &MMI = MF.getMMI();
 return (MF.getTarget().Options.DisableFramePointerElim(MF) ||
 TRI->needsStackRealignment(MF) ||
 MFI.hasVarSizedObjects() ||
 MFI.isFrameAddressTaken() || MFI.hasOpaqueSPAdjustment() ||
 MF.getInfo<X86MachineFunctionInfo>()->getForceFramePointer() ||
-MMI.callsUnwindInit() || MMI.hasEHFunclets() || MMI.callsEHReturn() ||
+MF.callsUnwindInit() || MF.hasEHFunclets() || MF.callsEHReturn() ||
 MFI.hasStackMap() || MFI.hasPatchPoint() ||
 MFI.hasCopyImplyingStackAdjustment());
 }
 static unsigned getSUBriOpcode(unsigned IsLP64, int64_t Imm) {
 MachineBasicBlock::iterator &MBBI,
 const X86RegisterInfo *TRI,
 bool Is64Bit) {
 const MachineFunction *MF = MBB.getParent();
 const Function *F = MF->getFunction();
-if (!F || MF->getMMI().callsEHReturn())
+if (!F || MF->callsEHReturn())
 return 0;
 const TargetRegisterClass &AvailableRegs = *TRI->getGPRsForTailCall(*MF);
 if (MBBI == MBB.end())
 void X86FrameLowering::emitSPUpdate(MachineBasicBlock &MBB,
 MachineBasicBlock::iterator &MBBI,
 int64_t NumBytes, bool InEpilogue) const {
 bool isSub = NumBytes < 0;
 uint64_t Offset = isSub ? -NumBytes : NumBytes;
+MachineInstr::MIFlag Flag =
+isSub ? MachineInstr::FrameSetup : MachineInstr::FrameDestroy;
 uint64_t Chunk = (1LL << 31) - 1;
 DebugLoc DL = MBB.findDebugLoc(MBBI);
+if (Offset > Chunk) {
+// Rather than emit a long series of instructions for large offsets,
+// load the offset into a register and do one sub/add
+unsigned Reg = 0;
+unsigned Rax = (unsigned)(Is64Bit ? X86::RAX : X86::EAX);
+if (isSub && !isEAXLiveIn(MBB))
+Reg = Rax;
+else
+Reg = findDeadCallerSavedReg(MBB, MBBI, TRI, Is64Bit);
+unsigned MovRIOpc = Is64Bit ? X86::MOV64ri : X86::MOV32ri;
+unsigned AddSubRROpc =
+isSub ? getSUBrrOpcode(Is64Bit) : getADDrrOpcode(Is64Bit);
+if (Reg) {
+BuildMI(MBB, MBBI, DL, TII.get(MovRIOpc), Reg)
+.addImm(Offset)
+.setMIFlag(Flag);
+MachineInstr *MI = BuildMI(MBB, MBBI, DL, TII.get(AddSubRROpc), StackPtr)
+.addReg(StackPtr)
+.addReg(Reg);
+MI->getOperand(3).setIsDead(); // The EFLAGS implicit def is dead.
+return;
+} else if (Offset > 8 * Chunk) {
+// If we would need more than 8 add or sub instructions (a >16GB stack
+// frame), it's worth spilling RAX to materialize this immediate.
+//   pushq %rax
+//   movabsq +-$Offset+-SlotSize, %rax
+//   addq %rsp, %rax
+//   xchg %rax, (%rsp)
+//   movq (%rsp), %rsp
+assert(Is64Bit && "can't have 32-bit 16GB stack frame");
+BuildMI(MBB, MBBI, DL, TII.get(X86::PUSH64r))
+.addReg(Rax, RegState::Kill)
+.setMIFlag(Flag);
+// Subtract is not commutative, so negate the offset and always use add.
+// Subtract 8 less and add 8 more to account for the PUSH we just did.
+if (isSub)
+Offset = -(Offset - SlotSize);
+else
+Offset = Offset + SlotSize;
+BuildMI(MBB, MBBI, DL, TII.get(MovRIOpc), Rax)
+.addImm(Offset)
+.setMIFlag(Flag);
+MachineInstr *MI = BuildMI(MBB, MBBI, DL, TII.get(X86::ADD64rr), Rax)
+.addReg(Rax)
+.addReg(StackPtr);
+MI->getOperand(3).setIsDead(); // The EFLAGS implicit def is dead.
+// Exchange the new SP in RAX with the top of the stack.
+addRegOffset(
+BuildMI(MBB, MBBI, DL, TII.get(X86::XCHG64rm), Rax).addReg(Rax),
+StackPtr, false, 0);
+// Load new SP from the top of the stack into RSP.
+addRegOffset(BuildMI(MBB, MBBI, DL, TII.get(X86::MOV64rm), StackPtr),
+StackPtr, false, 0);
+return;
+}
+}
 while (Offset) {
-if (Offset > Chunk) {
-// Rather than emit a long series of instructions for large offsets,
-// load the offset into a register and do one sub/add
-unsigned Reg = 0;
-if (isSub && !isEAXLiveIn(MBB))
-Reg = (unsigned)(Is64Bit ? X86::RAX : X86::EAX);
-else
-Reg = findDeadCallerSavedReg(MBB, MBBI, TRI, Is64Bit);
-if (Reg) {
-unsigned Opc = Is64Bit ? X86::MOV64ri : X86::MOV32ri;
-BuildMI(MBB, MBBI, DL, TII.get(Opc), Reg)
-.addImm(Offset);
-Opc = isSub
-? getSUBrrOpcode(Is64Bit)
-: getADDrrOpcode(Is64Bit);
-MachineInstr *MI = BuildMI(MBB, MBBI, DL, TII.get(Opc), StackPtr)
-.addReg(StackPtr)
-.addReg(Reg);
-MI->getOperand(3).setIsDead(); // The EFLAGS implicit def is dead.
-Offset = 0;
-continue;
-}
-}
 uint64_t ThisVal = std::min(Offset, Chunk);
-if (ThisVal == (Is64Bit ? 8 : 4)) {
+if (ThisVal == SlotSize) {
-// Use push / pop instead.
+// Use push / pop for slot sized adjustments as a size optimization. We
+// need to find a dead register when using pop.
 unsigned Reg = isSub
 ? (unsigned)(Is64Bit ? X86::RAX : X86::EAX)
 : findDeadCallerSavedReg(MBB, MBBI, TRI, Is64Bit);
 if (Reg) {
 unsigned Opc = isSub
 ? (Is64Bit ? X86::PUSH64r : X86::PUSH32r)
 : (Is64Bit ? X86::POP64r  : X86::POP32r);
-MachineInstr *MI = BuildMI(MBB, MBBI, DL, TII.get(Opc))
+BuildMI(MBB, MBBI, DL, TII.get(Opc))
-.addReg(Reg, getDefRegState(!isSub) | getUndefRegState(isSub));
+.addReg(Reg, getDefRegState(!isSub) | getUndefRegState(isSub))
-if (isSub)
+.setMIFlag(Flag);
-MI->setFlag(MachineInstr::FrameSetup);
-else
-MI->setFlag(MachineInstr::FrameDestroy);
 Offset -= ThisVal;
 continue;
 }
 }
-MachineInstrBuilder MI = BuildStackAdjustment(
+BuildStackAdjustment(MBB, MBBI, DL, isSub ? -ThisVal : ThisVal, InEpilogue)
-MBB, MBBI, DL, isSub ? -ThisVal : ThisVal, InEpilogue);
+.setMIFlag(Flag);
-if (isSub)
-MI.setMIFlag(MachineInstr::FrameSetup);
-else
-MI.setMIFlag(MachineInstr::FrameDestroy);
 Offset -= ThisVal;
 }
 }
 return 0;
 MachineBasicBlock::iterator PI = doMergeWithPrevious ? std::prev(MBBI) : MBBI;
 MachineBasicBlock::iterator NI = doMergeWithPrevious ? nullptr
 : std::next(MBBI);
+PI = skipDebugInstructionsBackward(PI, MBB.begin());
+if (NI != nullptr)
+NI = skipDebugInstructionsForward(NI, MBB.end());
 unsigned Opc = PI->getOpcode();
 int Offset = 0;
 if (!doMergeWithPrevious && NI != MBB.end() &&
 NI->getOpcode() == TargetOpcode::CFI_INSTRUCTION) {
 void X86FrameLowering::BuildCFI(MachineBasicBlock &MBB,
 MachineBasicBlock::iterator MBBI,
 const DebugLoc &DL,
 const MCCFIInstruction &CFIInst) const {
 MachineFunction &MF = *MBB.getParent();
-unsigned CFIIndex = MF.getMMI().addFrameInst(CFIInst);
+unsigned CFIIndex = MF.addFrameInst(CFIInst);
 BuildMI(MBB, MBBI, DL, TII.get(TargetOpcode::CFI_INSTRUCTION))
 .addCFIIndex(CFIIndex);
 }
 void X86FrameLowering::emitCalleeSavedFrameMoves(
 if (Is64Bit)
 CallOp = IsLargeCodeModel ? X86::CALL64r : X86::CALL64pcrel32;
 else
 CallOp = X86::CALLpcrel32;
-const char *Symbol;
+StringRef Symbol = STI.getTargetLowering()->getStackProbeSymbolName(MF);
-if (Is64Bit) {
-if (STI.isTargetCygMing()) {
-Symbol = "___chkstk_ms";
-} else {
-Symbol = "__chkstk";
-}
-} else if (STI.isTargetCygMing())
-Symbol = "_alloca";
-else
-Symbol = "_chkstk";
 MachineInstrBuilder CI;
 MachineBasicBlock::iterator ExpansionMBBI = std::prev(MBBI);
 // All current stack probes take AX and SP as input, clobber flags, and
 // preserve all registers. x86_64 probes leave RSP unmodified.
 if (Is64Bit && MF.getTarget().getCodeModel() == CodeModel::Large) {
 // For the large code model, we have to call through a register. Use R11,
 // as it is scratch in all supported calling conventions.
 BuildMI(MBB, MBBI, DL, TII.get(X86::MOV64ri), X86::R11)
-.addExternalSymbol(Symbol);
+.addExternalSymbol(MF.createExternalSymbolName(Symbol));
 CI = BuildMI(MBB, MBBI, DL, TII.get(CallOp)).addReg(X86::R11);
 } else {
-CI = BuildMI(MBB, MBBI, DL, TII.get(CallOp)).addExternalSymbol(Symbol);
+CI = BuildMI(MBB, MBBI, DL, TII.get(CallOp))
+.addExternalSymbol(MF.createExternalSymbolName(Symbol));
 }
 unsigned AX = Is64Bit ? X86::RAX : X86::EAX;
 unsigned SP = Is64Bit ? X86::RSP : X86::ESP;
 CI.addReg(AX, RegState::Implicit)
 .addReg(SP, RegState::Implicit)
 .addReg(AX, RegState::Define | RegState::Implicit)
 .addReg(SP, RegState::Define | RegState::Implicit)
 .addReg(X86::EFLAGS, RegState::Define | RegState::Implicit);
-if (Is64Bit) {
+if (STI.isTargetWin64() || !STI.isOSWindows()) {
+// MSVC x32's _chkstk and cygwin/mingw's _alloca adjust %esp themselves.
 // MSVC x64's __chkstk and cygwin/mingw's ___chkstk_ms do not adjust %rsp
-// themselves. It also does not clobber %rax so we can reuse it when
+// themselves. They also does not clobber %rax so we can reuse it when
 // adjusting %rsp.
-BuildMI(MBB, MBBI, DL, TII.get(X86::SUB64rr), X86::RSP)
+// All other platforms do not specify a particular ABI for the stack probe
-.addReg(X86::RSP)
+// function, so we arbitrarily define it to not adjust %esp/%rsp itself.
-.addReg(X86::RAX);
+BuildMI(MBB, MBBI, DL, TII.get(getSUBrrOpcode(Is64Bit)), SP)
+.addReg(SP)
+.addReg(AX);
 }
 if (InProlog) {
 // Apply the frame setup flag to all inserted instrs.
 for (++ExpansionMBBI; ExpansionMBBI != MBBI; ++ExpansionMBBI)
 [for all callee-saved registers]
 .cfi_offset %<reg>, (offset from %rsp)
 Notes:
 - .seh directives are emitted only for Windows 64 ABI
+- .cv_fpo directives are emitted on win32 when emitting CodeView
 - .cfi directives are emitted for all other ABIs
 - for 32-bit code, substitute %e?? registers for %r??
 */
 void X86FrameLowering::emitPrologue(MachineFunction &MF,
 bool IsFunclet = MBB.isEHFuncletEntry();
 EHPersonality Personality = EHPersonality::Unknown;
 if (Fn->hasPersonalityFn())
 Personality = classifyEHPersonality(Fn->getPersonalityFn());
 bool FnHasClrFunclet =
-MMI.hasEHFunclets() && Personality == EHPersonality::CoreCLR;
+MF.hasEHFunclets() && Personality == EHPersonality::CoreCLR;
 bool IsClrFunclet = IsFunclet && FnHasClrFunclet;
 bool HasFP = hasFP(MF);
 bool IsWin64CC = STI.isCallingConvWin64(Fn->getCallingConv());
 bool IsWin64Prologue = MF.getTarget().getMCAsmInfo()->usesWindowsCFI();
-bool NeedsWinCFI = IsWin64Prologue && Fn->needsUnwindTableEntry();
+bool NeedsWin64CFI = IsWin64Prologue && Fn->needsUnwindTableEntry();
+// FIXME: Emit FPO data for EH funclets.
+bool NeedsWinFPO =
+!IsFunclet && STI.isTargetWin32() && MMI.getModule()->getCodeViewFlag();
+bool NeedsWinCFI = NeedsWin64CFI || NeedsWinFPO;
 bool NeedsDwarfCFI =
 !IsWin64Prologue && (MMI.hasDebugInfo() || Fn->needsUnwindTableEntry());
 unsigned FramePtr = TRI->getFrameRegister(MF);
 const unsigned MachineFramePtr =
 STI.isTarget64BitILP32()
 ? getX86SubSuperRegister(FramePtr, 64) : FramePtr;
 unsigned BasePtr = TRI->getBaseRegister();
 bool HasWinCFI = false;
 // Debug location must be unknown since the first debug location is used
 // to determine the end of the prologue.
 DebugLoc DL;
 // Add RETADDR move area to callee saved frame size.
 if (TailCallReturnAddrDelta < 0)
 X86FI->setCalleeSavedFrameSize(
 X86FI->getCalleeSavedFrameSize() - TailCallReturnAddrDelta);
-bool UseStackProbe = (STI.isOSWindows() && !STI.isTargetMachO());
+bool UseStackProbe = !STI.getTargetLowering()->getStackProbeSymbolName(MF).empty();
 // The default stack probe size is 4096 if the function has no stackprobesize
 // attribute.
 unsigned StackProbeSize = 4096;
 if (Fn->hasFnAttribute("stack-probe-size"))
 Fn->getFnAttribute("stack-probe-size")
 .getValueAsString()
 .getAsInteger(0, StackProbeSize);
+// Re-align the stack on 64-bit if the x86-interrupt calling convention is
+// used and an error code was pushed, since the x86-64 ABI requires a 16-byte
+// stack alignment.
+if (Fn->getCallingConv() == CallingConv::X86_INTR && Is64Bit &&
+Fn->arg_size() == 2) {
+StackSize += 8;
+MFI.setStackSize(StackSize);
+emitSPUpdate(MBB, MBBI, -8, /*InEpilogue=*/false);
+}
 // If this is x86-64 and the Red Zone is not disabled, if we are a leaf
 // function, and use up to 128 bytes of stack space, don't have a frame
 // pointer, calls, or dynamic alloca then we do not need to adjust the
 // stack pointer (we fit in the Red Zone). We also check that we don't
 // push and pop from the stack.
 if (Is64Bit && !Fn->hasFnAttribute(Attribute::NoRedZone) &&
 !TRI->needsStackRealignment(MF) &&
 !MFI.hasVarSizedObjects() &&             // No dynamic alloca.
 !MFI.adjustsStack() &&                   // No calls.
+!UseStackProbe &&                        // No stack probes.
 !IsWin64CC &&                            // Win64 has no Red Zone
 !MFI.hasCopyImplyingStackAdjustment() && // Don't push and pop.
 !MF.shouldSplitStack()) {                // Regular stack
 uint64_t MinSize = X86FI->getCalleeSavedFrameSize();
 if (HasFP) MinSize += SlotSize;
 .setMIFlag(MachineInstr::FrameSetup);
 MBB.addLiveIn(Establisher);
 }
 if (HasFP) {
+assert(MF.getRegInfo().isReserved(MachineFramePtr) && "FP reserved");
 // Calculate required stack adjustment.
 uint64_t FrameSize = StackSize - SlotSize;
 // If required, include space for extra hidden slot for stashing base pointer.
 if (X86FI->getRestoreBasePointer())
 FrameSize += SlotSize;
 // Define the current CFA to use the EBP/RBP register.
 unsigned DwarfFramePtr = TRI->getDwarfRegNum(MachineFramePtr, true);
 BuildCFI(MBB, MBBI, DL, MCCFIInstruction::createDefCfaRegister(
 nullptr, DwarfFramePtr));
 }
-}
+if (NeedsWinFPO) {
-// Mark the FramePtr as live-in in every block. Don't do this again for
+// .cv_fpo_setframe $FramePtr
-// funclet prologues.
+HasWinCFI = true;
-if (!IsFunclet) {
+BuildMI(MBB, MBBI, DL, TII.get(X86::SEH_SetFrame))
-for (MachineBasicBlock &EveryMBB : MF)
+.addImm(FramePtr)
-EveryMBB.addLiveIn(MachineFramePtr);
+.addImm(0)
+.setMIFlag(MachineInstr::FrameSetup);
+}
 }
 } else {
 assert(!IsFunclet && "funclets without FPs not yet implemented");
 NumBytes = StackSize - X86FI->getCalleeSavedFrameSize();
 }
 StackOffset += stackGrowth;
 }
 if (NeedsWinCFI) {
 HasWinCFI = true;
-BuildMI(MBB, MBBI, DL, TII.get(X86::SEH_PushReg)).addImm(Reg).setMIFlag(
+BuildMI(MBB, MBBI, DL, TII.get(X86::SEH_PushReg))
-MachineInstr::FrameSetup);
+.addImm(Reg)
+.setMIFlag(MachineInstr::FrameSetup);
 }
 }
 // Realign stack after we pushed callee-saved registers (so that we'll be
 // able to calculate their offsets from the frame pointer).
 // virtual memory manager are allocated in correct sequence.
 uint64_t AlignedNumBytes = NumBytes;
 if (IsWin64Prologue && !IsFunclet && TRI->needsStackRealignment(MF))
 AlignedNumBytes = alignTo(AlignedNumBytes, MaxAlign);
 if (AlignedNumBytes >= StackProbeSize && UseStackProbe) {
+assert(!X86FI->getUsesRedZone() &&
+"The Red Zone is not accounted for in stack probes");
 // Check whether EAX is livein for this block.
 bool isEAXAlive = isEAXLiveIn(MBB);
 if (isEAXAlive) {
 // Sanity check that EAX is not livein for this function.
 BuildMI(MBB, MBBI, DL, TII.get(X86::MOV64rr), FramePtr)
 .addReg(SPOrEstablisher);
 // If this is not a funclet, emit the CFI describing our frame pointer.
 if (NeedsWinCFI && !IsFunclet) {
+assert(!NeedsWinFPO && "this setframe incompatible with FPO data");
 HasWinCFI = true;
 BuildMI(MBB, MBBI, DL, TII.get(X86::SEH_SetFrame))
 .addImm(FramePtr)
 .addImm(SEHFrameOffset)
 .setMIFlag(MachineInstr::FrameSetup);
 unsigned IgnoredFrameReg;
 int Offset = getFrameIndexReference(MF, FI, IgnoredFrameReg);
 Offset += SEHFrameOffset;
 HasWinCFI = true;
+assert(!NeedsWinFPO && "SEH_SaveXMM incompatible with FPO data");
 BuildMI(MBB, MBBI, DL, TII.get(X86::SEH_SaveXMM))
 .addImm(Reg)
 .addImm(Offset)
 .setMIFlag(MachineInstr::FrameSetup);
 }
 void X86FrameLowering::emitEpilogue(MachineFunction &MF,
 MachineBasicBlock &MBB) const {
 const MachineFrameInfo &MFI = MF.getFrameInfo();
 X86MachineFunctionInfo *X86FI = MF.getInfo<X86MachineFunctionInfo>();
-MachineBasicBlock::iterator MBBI = MBB.getFirstTerminator();
+MachineBasicBlock::iterator Terminator = MBB.getFirstTerminator();
-Optional<unsigned> RetOpcode;
+MachineBasicBlock::iterator MBBI = Terminator;
-if (MBBI != MBB.end())
-RetOpcode = MBBI->getOpcode();
 DebugLoc DL;
 if (MBBI != MBB.end())
 DL = MBBI->getDebugLoc();
 // standard x86_64 and NaCl use 64-bit frame/stack pointers, x32 - 32-bit.
 const bool Is64BitILP32 = STI.isTarget64BitILP32();
 unsigned FramePtr = TRI->getFrameRegister(MF);
 unsigned MachineFramePtr =
 Is64BitILP32 ? getX86SubSuperRegister(FramePtr, 64) : FramePtr;
 bool IsWin64Prologue = MF.getTarget().getMCAsmInfo()->usesWindowsCFI();
-bool NeedsWinCFI =
+bool NeedsWin64CFI =
 IsWin64Prologue && MF.getFunction()->needsUnwindTableEntry();
 bool IsFunclet = MBBI == MBB.end() ? false : isFuncletReturnInstr(*MBBI);
-MachineBasicBlock *TargetMBB = nullptr;
 // Get the number of bytes to allocate from the FrameInfo.
 uint64_t StackSize = MFI.getStackSize();
 uint64_t MaxAlign = calculateMaxStackAlign(MF);
 unsigned CSSize = X86FI->getCalleeSavedFrameSize();
+bool HasFP = hasFP(MF);
 uint64_t NumBytes = 0;
-if (RetOpcode && *RetOpcode == X86::CATCHRET) {
+if (IsFunclet) {
-// SEH shouldn't use catchret.
+assert(HasFP && "EH funclets without FP not yet implemented");
-assert(!isAsynchronousEHPersonality(
-classifyEHPersonality(MF.getFunction()->getPersonalityFn())) &&
-"SEH should not use CATCHRET");
 NumBytes = getWinEHFuncletFrameSize(MF);
-assert(hasFP(MF) && "EH funclets without FP not yet implemented");
+} else if (HasFP) {
-TargetMBB = MBBI->getOperand(0).getMBB();
+// Calculate required stack adjustment.
+uint64_t FrameSize = StackSize - SlotSize;
+NumBytes = FrameSize - CSSize;
+// Callee-saved registers were pushed on stack before the stack was
+// realigned.
+if (TRI->needsStackRealignment(MF) && !IsWin64Prologue)
+NumBytes = alignTo(FrameSize, MaxAlign);
+} else {
+NumBytes = StackSize - CSSize;
+}
+uint64_t SEHStackAllocAmt = NumBytes;
+if (HasFP) {
 // Pop EBP.
 BuildMI(MBB, MBBI, DL, TII.get(Is64Bit ? X86::POP64r : X86::POP32r),
 MachineFramePtr)
 .setMIFlag(MachineInstr::FrameDestroy);
-} else if (RetOpcode && *RetOpcode == X86::CLEANUPRET) {
+}
-NumBytes = getWinEHFuncletFrameSize(MF);
-assert(hasFP(MF) && "EH funclets without FP not yet implemented");
+MachineBasicBlock::iterator FirstCSPop = MBBI;
-BuildMI(MBB, MBBI, DL, TII.get(Is64Bit ? X86::POP64r : X86::POP32r),
-MachineFramePtr)
-.setMIFlag(MachineInstr::FrameDestroy);
-} else if (hasFP(MF)) {
-// Calculate required stack adjustment.
-uint64_t FrameSize = StackSize - SlotSize;
-NumBytes = FrameSize - CSSize;
-// Callee-saved registers were pushed on stack before the stack was
-// realigned.
-if (TRI->needsStackRealignment(MF) && !IsWin64Prologue)
-NumBytes = alignTo(FrameSize, MaxAlign);
-// Pop EBP.
-BuildMI(MBB, MBBI, DL,
-TII.get(Is64Bit ? X86::POP64r : X86::POP32r), MachineFramePtr)
-.setMIFlag(MachineInstr::FrameDestroy);
-} else {
-NumBytes = StackSize - CSSize;
-}
-uint64_t SEHStackAllocAmt = NumBytes;
 // Skip the callee-saved pop instructions.
 while (MBBI != MBB.begin()) {
 MachineBasicBlock::iterator PI = std::prev(MBBI);
 unsigned Opc = PI->getOpcode();
-if ((Opc != X86::POP32r || !PI->getFlag(MachineInstr::FrameDestroy)) &&
+if (Opc != X86::DBG_VALUE && !PI->isTerminator()) {
-(Opc != X86::POP64r || !PI->getFlag(MachineInstr::FrameDestroy)) &&
+if ((Opc != X86::POP32r || !PI->getFlag(MachineInstr::FrameDestroy)) &&
-Opc != X86::DBG_VALUE && !PI->isTerminator())
+(Opc != X86::POP64r || !PI->getFlag(MachineInstr::FrameDestroy)))
 break;
+FirstCSPop = PI;
+}
 --MBBI;
 }
-MachineBasicBlock::iterator FirstCSPop = MBBI;
+MBBI = FirstCSPop;
-if (TargetMBB) {
+if (IsFunclet && Terminator->getOpcode() == X86::CATCHRET)
-// Fill EAX/RAX with the address of the target block.
+emitCatchRetReturnValue(MBB, FirstCSPop, &*Terminator);
-unsigned ReturnReg = STI.is64Bit() ? X86::RAX : X86::EAX;
-if (STI.is64Bit()) {
-// LEA64r TargetMBB(%rip), %rax
-BuildMI(MBB, FirstCSPop, DL, TII.get(X86::LEA64r), ReturnReg)
-.addReg(X86::RIP)
-.addImm(0)
-.addReg(0)
-.addMBB(TargetMBB)
-.addReg(0);
-} else {
-// MOV32ri $TargetMBB, %eax
-BuildMI(MBB, FirstCSPop, DL, TII.get(X86::MOV32ri), ReturnReg)
-.addMBB(TargetMBB);
-}
-// Record that we've taken the address of TargetMBB and no longer just
-// reference it in a terminator.
-TargetMBB->setHasAddressTaken();
-}
 if (MBBI != MBB.end())
 DL = MBBI->getDebugLoc();
 // If there is an ADD32ri or SUB32ri of ESP immediately before this
 // either in prologue or in epilogue.  This behavior causes a problem when a
 // call immediately precedes an epilogue, because the return address points
 // into the epilogue.  To cope with that, we insert an epilogue marker here,
 // then replace it with a 'nop' if it ends up immediately after a CALL in the
 // final emitted code.
-if (NeedsWinCFI && MF.hasWinCFI())
+if (NeedsWin64CFI && MF.hasWinCFI())
 BuildMI(MBB, MBBI, DL, TII.get(X86::SEH_Epilogue));
-if (!RetOpcode || !isTailCallOpcode(*RetOpcode)) {
+if (Terminator == MBB.end() || !isTailCallOpcode(Terminator->getOpcode())) {
 // Add the return addr area delta back since we are not tail calling.
 int Offset = -1 * X86FI->getTCReturnAddrDelta();
 assert(Offset >= 0 && "TCDelta should never be positive");
 if (Offset) {
-MBBI = MBB.getFirstTerminator();
 // Check for possible merge with preceding ADD instruction.
-Offset += mergeSPUpdates(MBB, MBBI, true);
+Offset += mergeSPUpdates(MBB, Terminator, true);
-emitSPUpdate(MBB, MBBI, Offset, /*InEpilogue=*/true);
+emitSPUpdate(MBB, Terminator, Offset, /*InEpilogue=*/true);
 }
 }
 }
-// NOTE: this only has a subset of the full frame index logic. In
-// particular, the FI < 0 and AfterFPPop logic is handled in
-// X86RegisterInfo::eliminateFrameIndex, but not here. Possibly
-// (probably?) it should be moved into here.
 int X86FrameLowering::getFrameIndexReference(const MachineFunction &MF, int FI,
 unsigned &FrameReg) const {
 const MachineFrameInfo &MFI = MF.getFrameInfo();
+bool IsFixed = MFI.isFixedObjectIndex(FI);
 // We can't calculate offset from frame pointer if the stack is realigned,
 // so enforce usage of stack/base pointer.  The base pointer is used when we
 // have dynamic allocas in addition to dynamic realignment.
 if (TRI->hasBasePointer(MF))
-FrameReg = TRI->getBaseRegister();
+FrameReg = IsFixed ? TRI->getFramePtr() : TRI->getBaseRegister();
 else if (TRI->needsStackRealignment(MF))
-FrameReg = TRI->getStackRegister();
+FrameReg = IsFixed ? TRI->getFramePtr() : TRI->getStackRegister();
 else
 FrameReg = TRI->getFrameRegister(MF);
 // Offset will hold the offset from the stack pointer at function entry to the
 // object.
 if (TailCallReturnAddrDelta < 0)
 Offset -= TailCallReturnAddrDelta;
 }
 return Offset + FPDelta;
+}
+int X86FrameLowering::getFrameIndexReferenceSP(const MachineFunction &MF,
+int FI, unsigned &FrameReg,
+int Adjustment) const {
+const MachineFrameInfo &MFI = MF.getFrameInfo();
+FrameReg = TRI->getStackRegister();
+return MFI.getObjectOffset(FI) - getOffsetOfLocalArea() + Adjustment;
 }
 int
 X86FrameLowering::getFrameIndexReferencePreferSP(const MachineFunction &MF,
 int FI, unsigned &FrameReg,
 // We don't handle tail calls, and shouldn't be seeing them either.
 assert(MF.getInfo<X86MachineFunctionInfo>()->getTCReturnAddrDelta() >= 0 &&
 "we don't handle this case!");
-// Fill in FrameReg output argument.
-FrameReg = TRI->getStackRegister();
 // This is how the math works out:
 //
 //  %rsp grows (i.e. gets lower) left to right. Each box below is
 //  one word (eight bytes).  Obj0 is the stack slot we're trying to
 //  get to.
 // E is also the value of %rsp after stack has been set up, and we
 // want (C - E) -- the value we can add to %rsp to get to Obj0.  Now
 // (C - E) == (C - A) - (B - A) + (B - E)
 //            { Using [1], [2] and [3] above }
 //         == getObjectOffset - LocalAreaOffset + StackSize
-//
+return getFrameIndexReferenceSP(MF, FI, FrameReg, StackSize);
-// Get the Offset from the StackPointer
-int Offset = MFI.getObjectOffset(FI) - getOffsetOfLocalArea();
-return Offset + StackSize;
 }
 bool X86FrameLowering::assignCalleeSavedSpillSlots(
 MachineFunction &MF, const TargetRegisterInfo *TRI,
 std::vector<CalleeSavedInfo> &CSI) const {
 unsigned Reg = CSI[i - 1].getReg();
 if (X86::GR64RegClass.contains(Reg) || X86::GR32RegClass.contains(Reg))
 continue;
 const TargetRegisterClass *RC = TRI->getMinimalPhysRegClass(Reg);
+unsigned Size = TRI->getSpillSize(*RC);
+unsigned Align = TRI->getSpillAlignment(*RC);
 // ensure alignment
-SpillSlotOffset -= std::abs(SpillSlotOffset) % RC->getAlignment();
+SpillSlotOffset -= std::abs(SpillSlotOffset) % Align;
 // spill into slot
-SpillSlotOffset -= RC->getSize();
+SpillSlotOffset -= Size;
-int SlotIndex =
+int SlotIndex = MFI.CreateFixedSpillStackObject(Size, SpillSlotOffset);
-MFI.CreateFixedSpillStackObject(RC->getSize(), SpillSlotOffset);
 CSI[i - 1].setFrameIdx(SlotIndex);
-MFI.ensureMaxAlignment(RC->getAlignment());
+MFI.ensureMaxAlignment(Align);
 }
 return true;
 }
 }
 return true;
 }
+void X86FrameLowering::emitCatchRetReturnValue(MachineBasicBlock &MBB,
+MachineBasicBlock::iterator MBBI,
+MachineInstr *CatchRet) const {
+// SEH shouldn't use catchret.
+assert(!isAsynchronousEHPersonality(classifyEHPersonality(
+MBB.getParent()->getFunction()->getPersonalityFn())) &&
+"SEH should not use CATCHRET");
+DebugLoc DL = CatchRet->getDebugLoc();
+MachineBasicBlock *CatchRetTarget = CatchRet->getOperand(0).getMBB();
+// Fill EAX/RAX with the address of the target block.
+if (STI.is64Bit()) {
+// LEA64r CatchRetTarget(%rip), %rax
+BuildMI(MBB, MBBI, DL, TII.get(X86::LEA64r), X86::RAX)
+.addReg(X86::RIP)
+.addImm(0)
+.addReg(0)
+.addMBB(CatchRetTarget)
+.addReg(0);
+} else {
+// MOV32ri $CatchRetTarget, %eax
+BuildMI(MBB, MBBI, DL, TII.get(X86::MOV32ri), X86::EAX)
+.addMBB(CatchRetTarget);
+}
+// Record that we've taken the address of CatchRetTarget and no longer just
+// reference it in a terminator.
+CatchRetTarget->setHasAddressTaken();
+}
 bool X86FrameLowering::restoreCalleeSavedRegisters(MachineBasicBlock &MBB,
 MachineBasicBlock::iterator MI,
-const std::vector<CalleeSavedInfo> &CSI,
+std::vector<CalleeSavedInfo> &CSI,
 const TargetRegisterInfo *TRI) const {
 if (CSI.empty())
 return false;
 if (MI != MBB.end() && isFuncletReturnInstr(*MI) && STI.isOSWindows()) {
 // Spill the BasePtr if it's used.
 if (TRI->hasBasePointer(MF)) {
 SavedRegs.set(TRI->getBaseRegister());
 // Allocate a spill slot for EBP if we have a base pointer and EH funclets.
-if (MF.getMMI().hasEHFunclets()) {
+if (MF.hasEHFunclets()) {
 int FI = MFI.CreateSpillStackObject(SlotSize, SlotSize);
 X86FI->setHasSEHFramePtrSave(true);
 X86FI->setSEHFramePtrSaveIndex(FI);
 }
 }
 MachineBasicBlock::iterator I) const {
 bool reserveCallFrame = hasReservedCallFrame(MF);
 unsigned Opcode = I->getOpcode();
 bool isDestroy = Opcode == TII.getCallFrameDestroyOpcode();
 DebugLoc DL = I->getDebugLoc();
-uint64_t Amount = !reserveCallFrame ? I->getOperand(0).getImm() : 0;
+uint64_t Amount = !reserveCallFrame ? TII.getFrameSize(*I) : 0;
-uint64_t InternalAmt = (isDestroy || Amount) ? I->getOperand(1).getImm() : 0;
+uint64_t InternalAmt = (isDestroy || Amount) ? TII.getFrameAdjustment(*I) : 0;
 I = MBB.erase(I);
+auto InsertPos = skipDebugInstructionsForward(I, MBB.end());
 if (!reserveCallFrame) {
 // If the stack pointer can be changed after prologue, turn the
 // adjcallstackup instruction into a 'sub ESP, <amt>' and the
 // adjcallstackdown instruction into 'add ESP, <amt>'
 // using GNU_ARGS_SIZE. Note that this may be necessary even when
 // Amount == 0, because the preceding function may have set a non-0
 // GNU_ARGS_SIZE.
 // TODO: We don't need to reset this between subsequent functions,
 // if it didn't change.
-bool HasDwarfEHHandlers = !WindowsCFI &&
+bool HasDwarfEHHandlers = !WindowsCFI && !MF.getLandingPads().empty();
-!MF.getMMI().getLandingPads().empty();
 if (HasDwarfEHHandlers && !isDestroy &&
 MF.getInfo<X86MachineFunctionInfo>()->getHasPushSequences())
-BuildCFI(MBB, I, DL,
+BuildCFI(MBB, InsertPos, DL,
 MCCFIInstruction::createGnuArgsSize(nullptr, Amount));
 if (Amount == 0)
 return I;
 // TODO: This is needed only if we require precise CFA.
 // If this is a callee-pop calling convention, emit a CFA adjust for
 // the amount the callee popped.
 if (isDestroy && InternalAmt && DwarfCFI && !hasFP(MF))
-BuildCFI(MBB, I, DL,
+BuildCFI(MBB, InsertPos, DL,
 MCCFIInstruction::createAdjustCfaOffset(nullptr, -InternalAmt));
 // Add Amount to SP to destroy a frame, or subtract to setup.
 int64_t StackAdjustment = isDestroy ? Amount : -Amount;
 int64_t CfaAdjustment = -StackAdjustment;
 if (StackAdjustment) {
 // Merge with any previous or following adjustment instruction. Note: the
 // instructions merged with here do not have CFI, so their stack
 // adjustments do not feed into CfaAdjustment.
-StackAdjustment += mergeSPUpdates(MBB, I, true);
+StackAdjustment += mergeSPUpdates(MBB, InsertPos, true);
-StackAdjustment += mergeSPUpdates(MBB, I, false);
+StackAdjustment += mergeSPUpdates(MBB, InsertPos, false);
 if (StackAdjustment) {
 if (!(Fn->optForMinSize() &&
-adjustStackWithPops(MBB, I, DL, StackAdjustment)))
+adjustStackWithPops(MBB, InsertPos, DL, StackAdjustment)))
-BuildStackAdjustment(MBB, I, DL, StackAdjustment,
+BuildStackAdjustment(MBB, InsertPos, DL, StackAdjustment,
 /*InEpilogue=*/false);
 }
 }
 if (DwarfCFI && !hasFP(MF)) {
 // it to be more precise.
 // TODO: When not using precise CFA, we also need to adjust for the
 // InternalAmt here.
 if (CfaAdjustment) {
-BuildCFI(MBB, I, DL, MCCFIInstruction::createAdjustCfaOffset(
+BuildCFI(MBB, InsertPos, DL,
-nullptr, CfaAdjustment));
+MCCFIInstruction::createAdjustCfaOffset(nullptr,
+CfaAdjustment));
 }
 }
 return I;
 }
 return Offset;
 }
 void X86FrameLowering::processFunctionBeforeFrameFinalized(
 MachineFunction &MF, RegScavenger *RS) const {
+// Mark the function as not having WinCFI. We will set it back to true in
+// emitPrologue if it gets called and emits CFI.
+MF.setHasWinCFI(false);
 // If this function isn't doing Win64-style C++ EH, we don't need to do
 // anything.
 const Function *Fn = MF.getFunction();
-if (!STI.is64Bit() || !MF.getMMI().hasEHFunclets() ||
+if (!STI.is64Bit() || !MF.hasEHFunclets() ||
 classifyEHPersonality(Fn->getPersonalityFn()) != EHPersonality::MSVC_CXX)
 return;
 // Win64 C++ EH needs to allocate the UnwindHelp object at some fixed offset
 // relative to RSP after the prologue.  Find the offset of the last fixed

Mercurial > hg > Members > tobaru > cbc > CbC_llvm

comparison lib/Target/X86/X86FrameLowering.cpp @ 121:803732b1fca8