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comparison test/CodeGen/SystemZ/trap-03.ll @ 121:803732b1fca8

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LLVM 5.0
author kono
date Fri, 27 Oct 2017 17:07:41 +0900
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120:1172e4bd9c6f 121:803732b1fca8
1 ; Test load-and-trap instructions (LAT/LGAT)
2 ;
3 ; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=zEC12 | FileCheck %s
4
5 declare void @llvm.trap()
6
7 ; Check LAT with no displacement.
8 define i32 @f1(i32 *%ptr) {
9 ; CHECK-LABEL: f1:
10 ; CHECK: lat %r2, 0(%r2)
11 ; CHECK: br %r14
12 entry:
13 %val = load i32, i32 *%ptr
14 %cmp = icmp eq i32 %val, 0
15 br i1 %cmp, label %if.then, label %if.end
16
17 if.then: ; preds = %entry
18 tail call void @llvm.trap()
19 unreachable
20
21 if.end: ; preds = %entry
22 ret i32 %val
23 }
24
25 ; Check the high end of the LAT range.
26 define i32 @f2(i32 *%src) {
27 ; CHECK-LABEL: f2:
28 ; CHECK: lat %r2, 524284(%r2)
29 ; CHECK: br %r14
30 %ptr = getelementptr i32, i32 *%src, i64 131071
31 %val = load i32, i32 *%ptr
32 %cmp = icmp eq i32 %val, 0
33 br i1 %cmp, label %if.then, label %if.end
34
35 if.then: ; preds = %entry
36 tail call void @llvm.trap()
37 unreachable
38
39 if.end: ; preds = %entry
40 ret i32 %val
41 }
42
43 ; Check the next word up, which needs separate address logic.
44 ; Other sequences besides this one would be OK.
45 define i32 @f3(i32 *%src) {
46 ; CHECK-LABEL: f3:
47 ; CHECK: agfi %r2, 524288
48 ; CHECK: lat %r2, 0(%r2)
49 ; CHECK: br %r14
50 %ptr = getelementptr i32, i32 *%src, i64 131072
51 %val = load i32, i32 *%ptr
52 %cmp = icmp eq i32 %val, 0
53 br i1 %cmp, label %if.then, label %if.end
54
55 if.then: ; preds = %entry
56 tail call void @llvm.trap()
57 unreachable
58
59 if.end: ; preds = %entry
60 ret i32 %val
61 }
62
63 ; Check that LAT allows an index.
64 define i32 @f4(i64 %src, i64 %index) {
65 ; CHECK-LABEL: f4:
66 ; CHECK: lat %r2, 524287(%r3,%r2)
67 ; CHECK: br %r14
68 %add1 = add i64 %src, %index
69 %add2 = add i64 %add1, 524287
70 %ptr = inttoptr i64 %add2 to i32 *
71 %val = load i32, i32 *%ptr
72 %cmp = icmp eq i32 %val, 0
73 br i1 %cmp, label %if.then, label %if.end
74
75 if.then: ; preds = %entry
76 tail call void @llvm.trap()
77 unreachable
78
79 if.end: ; preds = %entry
80 ret i32 %val
81 }
82
83 ; Check LGAT with no displacement.
84 define i64 @f5(i64 *%ptr) {
85 ; CHECK-LABEL: f5:
86 ; CHECK: lgat %r2, 0(%r2)
87 ; CHECK: br %r14
88 entry:
89 %val = load i64, i64 *%ptr
90 %cmp = icmp eq i64 %val, 0
91 br i1 %cmp, label %if.then, label %if.end
92
93 if.then: ; preds = %entry
94 tail call void @llvm.trap()
95 unreachable
96
97 if.end: ; preds = %entry
98 ret i64 %val
99 }
100
101 ; Check the high end of the LGAT range.
102 define i64 @f6(i64 *%src) {
103 ; CHECK-LABEL: f6:
104 ; CHECK: lgat %r2, 524280(%r2)
105 ; CHECK: br %r14
106 %ptr = getelementptr i64, i64 *%src, i64 65535
107 %val = load i64, i64 *%ptr
108 %cmp = icmp eq i64 %val, 0
109 br i1 %cmp, label %if.then, label %if.end
110
111 if.then: ; preds = %entry
112 tail call void @llvm.trap()
113 unreachable
114
115 if.end: ; preds = %entry
116 ret i64 %val
117 }
118
119 ; Check the next word up, which needs separate address logic.
120 ; Other sequences besides this one would be OK.
121 define i64 @f7(i64 *%src) {
122 ; CHECK-LABEL: f7:
123 ; CHECK: agfi %r2, 524288
124 ; CHECK: lgat %r2, 0(%r2)
125 ; CHECK: br %r14
126 %ptr = getelementptr i64, i64 *%src, i64 65536
127 %val = load i64, i64 *%ptr
128 %cmp = icmp eq i64 %val, 0
129 br i1 %cmp, label %if.then, label %if.end
130
131 if.then: ; preds = %entry
132 tail call void @llvm.trap()
133 unreachable
134
135 if.end: ; preds = %entry
136 ret i64 %val
137 }
138
139 ; Check that LGAT allows an index.
140 define i64 @f8(i64 %src, i64 %index) {
141 ; CHECK-LABEL: f8:
142 ; CHECK: lgat %r2, 524287(%r3,%r2)
143 ; CHECK: br %r14
144 %add1 = add i64 %src, %index
145 %add2 = add i64 %add1, 524287
146 %ptr = inttoptr i64 %add2 to i64 *
147 %val = load i64, i64 *%ptr
148 %cmp = icmp eq i64 %val, 0
149 br i1 %cmp, label %if.then, label %if.end
150
151 if.then: ; preds = %entry
152 tail call void @llvm.trap()
153 unreachable
154
155 if.end: ; preds = %entry
156 ret i64 %val
157 }