comparison test/CodeGen/ARM/bfx.ll @ 0:95c75e76d11b

LLVM 3.4
author Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
date Thu, 12 Dec 2013 13:56:28 +0900
parents
children 54457678186b
comparison
equal deleted inserted replaced
-1:000000000000 0:95c75e76d11b
1 ; RUN: llc < %s -march=arm -mattr=+v7 | FileCheck %s
2
3 define i32 @sbfx1(i32 %a) {
4 ; CHECK: sbfx1
5 ; CHECK: sbfx r0, r0, #7, #11
6 %t1 = lshr i32 %a, 7
7 %t2 = trunc i32 %t1 to i11
8 %t3 = sext i11 %t2 to i32
9 ret i32 %t3
10 }
11
12 define i32 @ubfx1(i32 %a) {
13 ; CHECK: ubfx1
14 ; CHECK: ubfx r0, r0, #7, #11
15 %t1 = lshr i32 %a, 7
16 %t2 = trunc i32 %t1 to i11
17 %t3 = zext i11 %t2 to i32
18 ret i32 %t3
19 }
20
21 define i32 @ubfx2(i32 %a) {
22 ; CHECK: ubfx2
23 ; CHECK: ubfx r0, r0, #7, #11
24 %t1 = lshr i32 %a, 7
25 %t2 = and i32 %t1, 2047
26 ret i32 %t2
27 }
28
29 ; rdar://12870177
30 define i32 @ubfx_opt(i32* nocapture %ctx, i32 %x) nounwind readonly ssp {
31 entry:
32 ; CHECK: ubfx_opt
33 ; CHECK: lsr [[REG1:(lr|r[0-9]+)]], r1, #24
34 ; CHECK: ldr {{lr|r[0-9]+}}, [r0, [[REG1]], lsl #2]
35 ; CHECK: ubfx [[REG2:(lr|r[0-9]+)]], r1, #16, #8
36 ; CHECK: ldr {{lr|r[0-9]+}}, [r0, [[REG2]], lsl #2]
37 ; CHECK: ubfx [[REG3:(lr|r[0-9]+)]], r1, #8, #8
38 ; CHECK: ldr {{lr|r[0-9]+}}, [r0, [[REG3]], lsl #2]
39 %and = lshr i32 %x, 8
40 %shr = and i32 %and, 255
41 %and1 = lshr i32 %x, 16
42 %shr2 = and i32 %and1, 255
43 %shr4 = lshr i32 %x, 24
44 %arrayidx = getelementptr inbounds i32* %ctx, i32 %shr4
45 %0 = load i32* %arrayidx, align 4
46 %arrayidx5 = getelementptr inbounds i32* %ctx, i32 %shr2
47 %1 = load i32* %arrayidx5, align 4
48 %add = add i32 %1, %0
49 %arrayidx6 = getelementptr inbounds i32* %ctx, i32 %shr
50 %2 = load i32* %arrayidx6, align 4
51 %add7 = add i32 %add, %2
52 ret i32 %add7
53 }