Mercurial > hg > Members > tobaru > cbc > CbC_llvm
comparison test/CodeGen/X86/avx512-mov.ll @ 0:95c75e76d11b
LLVM 3.4
author | Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> |
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date | Thu, 12 Dec 2013 13:56:28 +0900 |
parents | |
children | e4204d083e25 |
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-1:000000000000 | 0:95c75e76d11b |
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1 ; RUN: llc < %s -march=x86-64 -mtriple=x86_64-apple-darwin -mcpu=knl | FileCheck %s | |
2 | |
3 ; CHECK-LABEL: @test1 | |
4 ; CHECK: vmovdz %xmm0, %eax | |
5 ; CHECK: ret | |
6 define i32 @test1(float %x) { | |
7 %res = bitcast float %x to i32 | |
8 ret i32 %res | |
9 } | |
10 | |
11 ; CHECK-LABEL: @test2 | |
12 ; CHECK: vmovdz %edi | |
13 ; CHECK: ret | |
14 define <4 x i32> @test2(i32 %x) { | |
15 %res = insertelement <4 x i32>undef, i32 %x, i32 0 | |
16 ret <4 x i32>%res | |
17 } | |
18 | |
19 ; CHECK-LABEL: @test3 | |
20 ; CHECK: vmovqz %rdi | |
21 ; CHECK: ret | |
22 define <2 x i64> @test3(i64 %x) { | |
23 %res = insertelement <2 x i64>undef, i64 %x, i32 0 | |
24 ret <2 x i64>%res | |
25 } | |
26 | |
27 ; CHECK-LABEL: @test4 | |
28 ; CHECK: vmovdz (%rdi) | |
29 ; CHECK: ret | |
30 define <4 x i32> @test4(i32* %x) { | |
31 %y = load i32* %x | |
32 %res = insertelement <4 x i32>undef, i32 %y, i32 0 | |
33 ret <4 x i32>%res | |
34 } | |
35 | |
36 ; CHECK-LABEL: @test5 | |
37 ; CHECK: vmovssz %xmm0, (%rdi) | |
38 ; CHECK: ret | |
39 define void @test5(float %x, float* %y) { | |
40 store float %x, float* %y, align 4 | |
41 ret void | |
42 } | |
43 | |
44 ; CHECK-LABEL: @test6 | |
45 ; CHECK: vmovsdz %xmm0, (%rdi) | |
46 ; CHECK: ret | |
47 define void @test6(double %x, double* %y) { | |
48 store double %x, double* %y, align 8 | |
49 ret void | |
50 } | |
51 | |
52 ; CHECK-LABEL: @test7 | |
53 ; CHECK: vmovssz (%rdi), %xmm0 | |
54 ; CHECK: ret | |
55 define float @test7(i32* %x) { | |
56 %y = load i32* %x | |
57 %res = bitcast i32 %y to float | |
58 ret float %res | |
59 } | |
60 | |
61 ; CHECK-LABEL: @test8 | |
62 ; CHECK: vmovdz %xmm0, %eax | |
63 ; CHECK: ret | |
64 define i32 @test8(<4 x i32> %x) { | |
65 %res = extractelement <4 x i32> %x, i32 0 | |
66 ret i32 %res | |
67 } | |
68 | |
69 ; CHECK-LABEL: @test9 | |
70 ; CHECK: vmovqz %xmm0, %rax | |
71 ; CHECK: ret | |
72 define i64 @test9(<2 x i64> %x) { | |
73 %res = extractelement <2 x i64> %x, i32 0 | |
74 ret i64 %res | |
75 } | |
76 | |
77 ; CHECK-LABEL: @test10 | |
78 ; CHECK: vmovdz (%rdi) | |
79 ; CHECK: ret | |
80 define <4 x i32> @test10(i32* %x) { | |
81 %y = load i32* %x, align 4 | |
82 %res = insertelement <4 x i32>zeroinitializer, i32 %y, i32 0 | |
83 ret <4 x i32>%res | |
84 } | |
85 | |
86 ; CHECK-LABEL: @test11 | |
87 ; CHECK: vmovssz (%rdi) | |
88 ; CHECK: ret | |
89 define <4 x float> @test11(float* %x) { | |
90 %y = load float* %x, align 4 | |
91 %res = insertelement <4 x float>zeroinitializer, float %y, i32 0 | |
92 ret <4 x float>%res | |
93 } | |
94 | |
95 ; CHECK-LABEL: @test12 | |
96 ; CHECK: vmovsdz (%rdi) | |
97 ; CHECK: ret | |
98 define <2 x double> @test12(double* %x) { | |
99 %y = load double* %x, align 8 | |
100 %res = insertelement <2 x double>zeroinitializer, double %y, i32 0 | |
101 ret <2 x double>%res | |
102 } | |
103 | |
104 ; CHECK-LABEL: @test13 | |
105 ; CHECK: vmovqz %rdi | |
106 ; CHECK: ret | |
107 define <2 x i64> @test13(i64 %x) { | |
108 %res = insertelement <2 x i64>zeroinitializer, i64 %x, i32 0 | |
109 ret <2 x i64>%res | |
110 } | |
111 | |
112 ; CHECK-LABEL: @test14 | |
113 ; CHECK: vmovdz %edi | |
114 ; CHECK: ret | |
115 define <4 x i32> @test14(i32 %x) { | |
116 %res = insertelement <4 x i32>zeroinitializer, i32 %x, i32 0 | |
117 ret <4 x i32>%res | |
118 } | |
119 | |
120 ; CHECK-LABEL: @test15 | |
121 ; CHECK: vmovdz (%rdi) | |
122 ; CHECK: ret | |
123 define <4 x i32> @test15(i32* %x) { | |
124 %y = load i32* %x, align 4 | |
125 %res = insertelement <4 x i32>zeroinitializer, i32 %y, i32 0 | |
126 ret <4 x i32>%res | |
127 } | |
128 | |
129 ; CHECK-LABEL: test16 | |
130 ; CHECK: vmovdqu32 | |
131 ; CHECK: ret | |
132 define <16 x i32> @test16(i8 * %addr) { | |
133 %vaddr = bitcast i8* %addr to <16 x i32>* | |
134 %res = load <16 x i32>* %vaddr, align 1 | |
135 ret <16 x i32>%res | |
136 } | |
137 | |
138 ; CHECK-LABEL: test17 | |
139 ; CHECK: vmovdqa32 | |
140 ; CHECK: ret | |
141 define <16 x i32> @test17(i8 * %addr) { | |
142 %vaddr = bitcast i8* %addr to <16 x i32>* | |
143 %res = load <16 x i32>* %vaddr, align 64 | |
144 ret <16 x i32>%res | |
145 } | |
146 | |
147 ; CHECK-LABEL: test18 | |
148 ; CHECK: vmovdqa64 | |
149 ; CHECK: ret | |
150 define void @test18(i8 * %addr, <8 x i64> %data) { | |
151 %vaddr = bitcast i8* %addr to <8 x i64>* | |
152 store <8 x i64>%data, <8 x i64>* %vaddr, align 64 | |
153 ret void | |
154 } | |
155 |