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comparison test/CodeGen/X86/cmp.ll @ 0:95c75e76d11b

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LLVM 3.4
author Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
date Thu, 12 Dec 2013 13:56:28 +0900
parents
children 54457678186b
comparison
equal deleted inserted replaced
-1:000000000000 0:95c75e76d11b
1 ; RUN: llc < %s -mtriple=x86_64-apple-darwin10 -show-mc-encoding | FileCheck %s
2
3 define i32 @test1(i32 %X, i32* %y) nounwind {
4 %tmp = load i32* %y ; <i32> [#uses=1]
5 %tmp.upgrd.1 = icmp eq i32 %tmp, 0 ; <i1> [#uses=1]
6 br i1 %tmp.upgrd.1, label %ReturnBlock, label %cond_true
7
8 cond_true: ; preds = %0
9 ret i32 1
10
11 ReturnBlock: ; preds = %0
12 ret i32 0
13 ; CHECK-LABEL: test1:
14 ; CHECK: cmpl $0, (%rsi)
15 }
16
17 define i32 @test2(i32 %X, i32* %y) nounwind {
18 %tmp = load i32* %y ; <i32> [#uses=1]
19 %tmp1 = shl i32 %tmp, 3 ; <i32> [#uses=1]
20 %tmp1.upgrd.2 = icmp eq i32 %tmp1, 0 ; <i1> [#uses=1]
21 br i1 %tmp1.upgrd.2, label %ReturnBlock, label %cond_true
22
23 cond_true: ; preds = %0
24 ret i32 1
25
26 ReturnBlock: ; preds = %0
27 ret i32 0
28 ; CHECK-LABEL: test2:
29 ; CHECK: movl (%rsi), %eax
30 ; CHECK: shll $3, %eax
31 ; CHECK: testl %eax, %eax
32 }
33
34 define i64 @test3(i64 %x) nounwind {
35 %t = icmp eq i64 %x, 0
36 %r = zext i1 %t to i64
37 ret i64 %r
38 ; CHECK-LABEL: test3:
39 ; CHECK: testq %rdi, %rdi
40 ; CHECK: sete %al
41 ; CHECK: movzbl %al, %eax
42 ; CHECK: ret
43 }
44
45 define i64 @test4(i64 %x) nounwind {
46 %t = icmp slt i64 %x, 1
47 %r = zext i1 %t to i64
48 ret i64 %r
49 ; CHECK-LABEL: test4:
50 ; CHECK: testq %rdi, %rdi
51 ; CHECK: setle %al
52 ; CHECK: movzbl %al, %eax
53 ; CHECK: ret
54 }
55
56
57 define i32 @test5(double %A) nounwind {
58 entry:
59 %tmp2 = fcmp ogt double %A, 1.500000e+02; <i1> [#uses=1]
60 %tmp5 = fcmp ult double %A, 7.500000e+01; <i1> [#uses=1]
61 %bothcond = or i1 %tmp2, %tmp5; <i1> [#uses=1]
62 br i1 %bothcond, label %bb8, label %bb12
63
64 bb8:; preds = %entry
65 %tmp9 = tail call i32 (...)* @foo( ) nounwind ; <i32> [#uses=1]
66 ret i32 %tmp9
67
68 bb12:; preds = %entry
69 ret i32 32
70 ; CHECK-LABEL: test5:
71 ; CHECK: ucomisd LCPI4_0(%rip), %xmm0
72 ; CHECK: ucomisd LCPI4_1(%rip), %xmm0
73 }
74
75 declare i32 @foo(...)
76
77 define i32 @test6() nounwind align 2 {
78 %A = alloca {i64, i64}, align 8
79 %B = getelementptr inbounds {i64, i64}* %A, i64 0, i32 1
80 %C = load i64* %B
81 %D = icmp eq i64 %C, 0
82 br i1 %D, label %T, label %F
83 T:
84 ret i32 1
85
86 F:
87 ret i32 0
88 ; CHECK-LABEL: test6:
89 ; CHECK: cmpq $0, -8(%rsp)
90 ; CHECK: encoding: [0x48,0x83,0x7c,0x24,0xf8,0x00]
91 }
92
93 ; rdar://11866926
94 define i32 @test7(i64 %res) nounwind {
95 entry:
96 ; CHECK-LABEL: test7:
97 ; CHECK-NOT: movabsq
98 ; CHECK: shrq $32, %rdi
99 ; CHECK: sete
100 %lnot = icmp ult i64 %res, 4294967296
101 %lnot.ext = zext i1 %lnot to i32
102 ret i32 %lnot.ext
103 }
104
105 define i32 @test8(i64 %res) nounwind {
106 entry:
107 ; CHECK-LABEL: test8:
108 ; CHECK-NOT: movabsq
109 ; CHECK: shrq $32, %rdi
110 ; CHECK: cmpq $3, %rdi
111 %lnot = icmp ult i64 %res, 12884901888
112 %lnot.ext = zext i1 %lnot to i32
113 ret i32 %lnot.ext
114 }
115
116 define i32 @test9(i64 %res) nounwind {
117 entry:
118 ; CHECK-LABEL: test9:
119 ; CHECK-NOT: movabsq
120 ; CHECK: shrq $33, %rdi
121 ; CHECK: sete
122 %lnot = icmp ult i64 %res, 8589934592
123 %lnot.ext = zext i1 %lnot to i32
124 ret i32 %lnot.ext
125 }
126
127 define i32 @test10(i64 %res) nounwind {
128 entry:
129 ; CHECK-LABEL: test10:
130 ; CHECK-NOT: movabsq
131 ; CHECK: shrq $32, %rdi
132 ; CHECK: setne
133 %lnot = icmp uge i64 %res, 4294967296
134 %lnot.ext = zext i1 %lnot to i32
135 ret i32 %lnot.ext
136 }
137
138 ; rdar://9758774
139 define i32 @test11(i64 %l) nounwind {
140 entry:
141 ; CHECK-LABEL: test11:
142 ; CHECK-NOT: movabsq
143 ; CHECK-NOT: andq
144 ; CHECK: shrq $47, %rdi
145 ; CHECK: cmpq $1, %rdi
146 %shr.mask = and i64 %l, -140737488355328
147 %cmp = icmp eq i64 %shr.mask, 140737488355328
148 %conv = zext i1 %cmp to i32
149 ret i32 %conv
150 }
151
152 define i32 @test12() uwtable ssp {
153 ; CHECK-LABEL: test12:
154 ; CHECK: testb
155 %1 = call zeroext i1 @test12b()
156 br i1 %1, label %2, label %3
157
158 ; <label>:2 ; preds = %0
159 ret i32 1
160
161 ; <label>:3 ; preds = %0
162 ret i32 2
163 }
164
165 declare zeroext i1 @test12b()