Mercurial > hg > Members > tobaru > cbc > CbC_llvm
comparison test/CodeGen/AMDGPU/fp_to_uint.f64.ll @ 95:afa8332a0e37
LLVM 3.8
author | Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> |
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date | Tue, 13 Oct 2015 17:48:58 +0900 |
parents | |
children | 1172e4bd9c6f |
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84:f3e34b893a5f | 95:afa8332a0e37 |
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1 ; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI %s | |
2 ; RUN: llc -march=amdgcn -mcpu=bonaire -verify-machineinstrs < %s | FileCheck -check-prefix=CI -check-prefix=FUNC %s | |
3 | |
4 declare i32 @llvm.r600.read.tidig.x() nounwind readnone | |
5 | |
6 ; SI-LABEL: {{^}}fp_to_uint_i32_f64: | |
7 ; SI: v_cvt_u32_f64_e32 | |
8 define void @fp_to_uint_i32_f64(i32 addrspace(1)* %out, double %in) { | |
9 %cast = fptoui double %in to i32 | |
10 store i32 %cast, i32 addrspace(1)* %out, align 4 | |
11 ret void | |
12 } | |
13 | |
14 ; SI-LABEL: @fp_to_uint_v2i32_v2f64 | |
15 ; SI: v_cvt_u32_f64_e32 | |
16 ; SI: v_cvt_u32_f64_e32 | |
17 define void @fp_to_uint_v2i32_v2f64(<2 x i32> addrspace(1)* %out, <2 x double> %in) { | |
18 %cast = fptoui <2 x double> %in to <2 x i32> | |
19 store <2 x i32> %cast, <2 x i32> addrspace(1)* %out, align 8 | |
20 ret void | |
21 } | |
22 | |
23 ; SI-LABEL: @fp_to_uint_v4i32_v4f64 | |
24 ; SI: v_cvt_u32_f64_e32 | |
25 ; SI: v_cvt_u32_f64_e32 | |
26 ; SI: v_cvt_u32_f64_e32 | |
27 ; SI: v_cvt_u32_f64_e32 | |
28 define void @fp_to_uint_v4i32_v4f64(<4 x i32> addrspace(1)* %out, <4 x double> %in) { | |
29 %cast = fptoui <4 x double> %in to <4 x i32> | |
30 store <4 x i32> %cast, <4 x i32> addrspace(1)* %out, align 8 | |
31 ret void | |
32 } | |
33 | |
34 ; FUNC-LABEL: @fp_to_uint_i64_f64 | |
35 ; CI-DAG: buffer_load_dwordx2 [[VAL:v\[[0-9]+:[0-9]+\]]] | |
36 ; CI-DAG: v_trunc_f64_e32 [[TRUNC:v\[[0-9]+:[0-9]+\]]], [[VAL]] | |
37 ; CI-DAG: s_mov_b32 s[[K0_LO:[0-9]+]], 0{{$}} | |
38 ; CI-DAG: s_mov_b32 s[[K0_HI:[0-9]+]], 0x3df00000 | |
39 | |
40 ; CI-DAG: v_mul_f64 [[MUL:v\[[0-9]+:[0-9]+\]]], [[VAL]], s{{\[}}[[K0_LO]]:[[K0_HI]]{{\]}} | |
41 ; CI-DAG: v_floor_f64_e32 [[FLOOR:v\[[0-9]+:[0-9]+\]]], [[MUL]] | |
42 | |
43 ; CI-DAG: s_mov_b32 s[[K1_HI:[0-9]+]], 0xc1f00000 | |
44 | |
45 ; CI-DAG: v_fma_f64 [[FMA:v\[[0-9]+:[0-9]+\]]], [[FLOOR]], s{{\[[0-9]+}}:[[K1_HI]]{{\]}}, [[TRUNC]] | |
46 ; CI-DAG: v_cvt_u32_f64_e32 v[[LO:[0-9]+]], [[FMA]] | |
47 ; CI-DAG: v_cvt_u32_f64_e32 v[[HI:[0-9]+]], [[FLOOR]] | |
48 ; CI: buffer_store_dwordx2 v{{\[}}[[LO]]:[[HI]]{{\]}} | |
49 define void @fp_to_uint_i64_f64(i64 addrspace(1)* %out, double addrspace(1)* %in) { | |
50 %tid = call i32 @llvm.r600.read.tidig.x() nounwind readnone | |
51 %gep = getelementptr double, double addrspace(1)* %in, i32 %tid | |
52 %val = load double, double addrspace(1)* %gep, align 8 | |
53 %cast = fptoui double %val to i64 | |
54 store i64 %cast, i64 addrspace(1)* %out, align 4 | |
55 ret void | |
56 } | |
57 | |
58 ; SI-LABEL: @fp_to_uint_v2i64_v2f64 | |
59 define void @fp_to_uint_v2i64_v2f64(<2 x i64> addrspace(1)* %out, <2 x double> %in) { | |
60 %cast = fptoui <2 x double> %in to <2 x i64> | |
61 store <2 x i64> %cast, <2 x i64> addrspace(1)* %out, align 16 | |
62 ret void | |
63 } | |
64 | |
65 ; SI-LABEL: @fp_to_uint_v4i64_v4f64 | |
66 define void @fp_to_uint_v4i64_v4f64(<4 x i64> addrspace(1)* %out, <4 x double> %in) { | |
67 %cast = fptoui <4 x double> %in to <4 x i64> | |
68 store <4 x i64> %cast, <4 x i64> addrspace(1)* %out, align 32 | |
69 ret void | |
70 } |