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comparison test/CodeGen/AMDGPU/vtx-schedule.ll @ 95:afa8332a0e37

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LLVM 3.8
author Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
date Tue, 13 Oct 2015 17:48:58 +0900
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children 803732b1fca8
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84:f3e34b893a5f 95:afa8332a0e37
1 ; RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck %s
2
3 ; This test is for a scheduler bug where VTX_READ instructions that used
4 ; the result of another VTX_READ instruction were being grouped in the
5 ; same fetch clasue.
6
7 ; CHECK: {{^}}test:
8 ; CHECK: Fetch clause
9 ; CHECK: VTX_READ_32 [[IN0:T[0-9]+\.X]], [[IN0]], 0
10 ; CHECK: Fetch clause
11 ; CHECK: VTX_READ_32 [[IN1:T[0-9]+\.X]], [[IN1]], 0
12 define void @test(i32 addrspace(1)* nocapture %out, i32 addrspace(1)* addrspace(1)* nocapture %in0) {
13 entry:
14 %0 = load i32 addrspace(1)*, i32 addrspace(1)* addrspace(1)* %in0
15 %1 = load i32, i32 addrspace(1)* %0
16 store i32 %1, i32 addrspace(1)* %out
17 ret void
18 }