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comparison test/CodeGen/ARM/fast-isel-pic.ll @ 95:afa8332a0e37

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LLVM 3.8
author Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
date Tue, 13 Oct 2015 17:48:58 +0900
parents 95c75e76d11b
children 7d135dc70f03
comparison
equal deleted inserted replaced
84:f3e34b893a5f 95:afa8332a0e37
1 ; RUN: llc < %s -O0 -verify-machineinstrs -fast-isel-abort -relocation-model=pic -mtriple=thumbv7-apple-ios | FileCheck %s --check-prefix=THUMB 1 ; RUN: llc < %s -O0 -verify-machineinstrs -fast-isel-abort=1 -relocation-model=pic -mtriple=thumbv7-apple-ios | FileCheck %s --check-prefix=THUMB
2 ; RUN: llc < %s -O0 -verify-machineinstrs -fast-isel-abort -relocation-model=pic -mtriple=arm-apple-ios | FileCheck %s --check-prefix=ARM 2 ; RUN: llc < %s -O0 -verify-machineinstrs -fast-isel-abort=1 -relocation-model=pic -mtriple=armv7-apple-ios | FileCheck %s --check-prefix=ARMv7
3 ; RUN: llc < %s -O0 -verify-machineinstrs -fast-isel-abort -relocation-model=pic -mtriple=armv7-apple-ios | FileCheck %s --check-prefix=ARMv7 3 ; RUN: llc < %s -O0 -verify-machineinstrs -fast-isel-abort=1 -relocation-model=pic -mtriple=thumbv7-none-linux-gnueabi | FileCheck %s --check-prefix=THUMB-ELF
4 ; RUN: llc < %s -O0 -verify-machineinstrs -fast-isel-abort -relocation-model=pic -mtriple=thumbv7-none-linux-gnueabi | FileCheck %s --check-prefix=THUMB-ELF 4 ; RUN: llc < %s -O0 -verify-machineinstrs -fast-isel-abort=1 -relocation-model=pic -mtriple=armv7-none-linux-gnueabi | FileCheck %s --check-prefix=ARMv7-ELF
5 ; RUN: llc < %s -O0 -verify-machineinstrs -fast-isel-abort -relocation-model=pic -mtriple=armv7-none-linux-gnueabi | FileCheck %s --check-prefix=ARMv7-ELF
6 5
7 @g = global i32 0, align 4 6 @g = global i32 0, align 4
8 7
9 define i32 @LoadGV() { 8 define i32 @LoadGV() {
10 entry: 9 entry:
27 ; ARMv7-ELF: ldr r[[reg2:[0-9]+]], 26 ; ARMv7-ELF: ldr r[[reg2:[0-9]+]],
28 ; ARMv7-ELF: .LPC 27 ; ARMv7-ELF: .LPC
29 ; ARMv7-ELF-NEXT: add r[[reg2]], pc 28 ; ARMv7-ELF-NEXT: add r[[reg2]], pc
30 ; ARMv7-ELF: ldr r[[reg3:[0-9]+]], 29 ; ARMv7-ELF: ldr r[[reg3:[0-9]+]],
31 ; ARMv7-ELF: ldr r[[reg2]], [r[[reg3]], r[[reg2]]] 30 ; ARMv7-ELF: ldr r[[reg2]], [r[[reg3]], r[[reg2]]]
32 %tmp = load i32* @g 31 %tmp = load i32, i32* @g
33 ret i32 %tmp 32 ret i32 %tmp
34 } 33 }
35 34
36 @i = external global i32 35 @i = external global i32
37 36
58 ; ARMv7-ELF: ldr r[[reg5:[0-9]+]], 57 ; ARMv7-ELF: ldr r[[reg5:[0-9]+]],
59 ; ARMv7-ELF: .LPC 58 ; ARMv7-ELF: .LPC
60 ; ARMv7-ELF-NEXT: add r[[reg5]], pc 59 ; ARMv7-ELF-NEXT: add r[[reg5]], pc
61 ; ARMv7-ELF: ldr r[[reg6:[0-9]+]], 60 ; ARMv7-ELF: ldr r[[reg6:[0-9]+]],
62 ; ARMv7-ELF: ldr r[[reg5]], [r[[reg6]], r[[reg5]]] 61 ; ARMv7-ELF: ldr r[[reg5]], [r[[reg6]], r[[reg5]]]
63 %tmp = load i32* @i 62 %tmp = load i32, i32* @i
64 ret i32 %tmp 63 ret i32 %tmp
65 } 64 }