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comparison test/CodeGen/Hexagon/maxh.ll @ 95:afa8332a0e37

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LLVM 3.8
author Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
date Tue, 13 Oct 2015 17:48:58 +0900
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84:f3e34b893a5f 95:afa8332a0e37
1 ; RUN: llc -march=hexagon < %s | FileCheck %s
2 ; The result of max(half-word, half-word) is also half-word.
3 ; Check that we are not producing a sign extend after the max.
4 ; CHECK-NOT: sxth
5
6 define i64 @test_cast(i64 %arg0, i16 zeroext %arg1, i16 zeroext %arg2) nounwind readnone {
7 entry:
8 %conv.i = zext i16 %arg1 to i32
9 %conv1.i = zext i16 %arg2 to i32
10 %sub.i = sub nsw i32 %conv.i, %conv1.i
11 %sext.i = shl i32 %sub.i, 16
12 %cmp.i = icmp slt i32 %sext.i, 65536
13 %0 = ashr exact i32 %sext.i, 16
14 %conv7.i = select i1 %cmp.i, i32 1, i32 %0
15 %cmp8.i = icmp sgt i32 %conv7.i, 4
16 %conv7.op.i = add i32 %conv7.i, 65535
17 %shl = shl i64 %arg0, 2
18 %.mask = and i32 %conv7.op.i, 65535
19 %1 = zext i32 %.mask to i64
20 %conv = select i1 %cmp8.i, i64 3, i64 %1
21 %or = or i64 %conv, %shl
22 ret i64 %or
23 }