Mercurial > hg > Members > tobaru > cbc > CbC_llvm
comparison test/CodeGen/SystemZ/unaligned-01.ll @ 95:afa8332a0e37
LLVM 3.8
author | Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> |
---|---|
date | Tue, 13 Oct 2015 17:48:58 +0900 |
parents | 95c75e76d11b |
children | 803732b1fca8 |
comparison
equal
deleted
inserted
replaced
84:f3e34b893a5f | 95:afa8332a0e37 |
---|---|
10 define void @f1(i8 *%ptr) { | 10 define void @f1(i8 *%ptr) { |
11 ; CHECK: f1 | 11 ; CHECK: f1 |
12 ; CHECK: iilf [[REG:%r[0-5]]], 66051 | 12 ; CHECK: iilf [[REG:%r[0-5]]], 66051 |
13 ; CHECK: st [[REG]], 0(%r2) | 13 ; CHECK: st [[REG]], 0(%r2) |
14 ; CHECK: br %r14 | 14 ; CHECK: br %r14 |
15 %off1 = getelementptr i8 *%ptr, i64 1 | 15 %off1 = getelementptr i8, i8 *%ptr, i64 1 |
16 %off2 = getelementptr i8 *%ptr, i64 2 | 16 %off2 = getelementptr i8, i8 *%ptr, i64 2 |
17 %off3 = getelementptr i8 *%ptr, i64 3 | 17 %off3 = getelementptr i8, i8 *%ptr, i64 3 |
18 store i8 0, i8 *%ptr | 18 store i8 0, i8 *%ptr |
19 store i8 1, i8 *%off1 | 19 store i8 1, i8 *%off1 |
20 store i8 2, i8 *%off2 | 20 store i8 2, i8 *%off2 |
21 store i8 3, i8 *%off3 | 21 store i8 3, i8 *%off3 |
22 ret void | 22 ret void |
26 define i16 @f2(i16 *%src, i16 *%dst) { | 26 define i16 @f2(i16 *%src, i16 *%dst) { |
27 ; CHECK-LABEL: f2: | 27 ; CHECK-LABEL: f2: |
28 ; CHECK: lh %r2, 0(%r2) | 28 ; CHECK: lh %r2, 0(%r2) |
29 ; CHECK: sth %r2, 0(%r3) | 29 ; CHECK: sth %r2, 0(%r3) |
30 ; CHECK: br %r14 | 30 ; CHECK: br %r14 |
31 %val = load i16 *%src, align 1 | 31 %val = load i16 , i16 *%src, align 1 |
32 store i16 %val, i16 *%dst, align 1 | 32 store i16 %val, i16 *%dst, align 1 |
33 ret i16 %val | 33 ret i16 %val |
34 } | 34 } |
35 | 35 |
36 ; Check that unaligned 4-byte accesses are allowed. | 36 ; Check that unaligned 4-byte accesses are allowed. |
38 ; CHECK-LABEL: f3: | 38 ; CHECK-LABEL: f3: |
39 ; CHECK: l %r2, 0(%r2) | 39 ; CHECK: l %r2, 0(%r2) |
40 ; CHECK: s %r2, 0(%r3) | 40 ; CHECK: s %r2, 0(%r3) |
41 ; CHECK: st %r2, 0(%r4) | 41 ; CHECK: st %r2, 0(%r4) |
42 ; CHECK: br %r14 | 42 ; CHECK: br %r14 |
43 %val1 = load i32 *%src1, align 1 | 43 %val1 = load i32 , i32 *%src1, align 1 |
44 %val2 = load i32 *%src2, align 2 | 44 %val2 = load i32 , i32 *%src2, align 2 |
45 %sub = sub i32 %val1, %val2 | 45 %sub = sub i32 %val1, %val2 |
46 store i32 %sub, i32 *%dst, align 1 | 46 store i32 %sub, i32 *%dst, align 1 |
47 ret i32 %sub | 47 ret i32 %sub |
48 } | 48 } |
49 | 49 |
52 ; CHECK-LABEL: f4: | 52 ; CHECK-LABEL: f4: |
53 ; CHECK: lg %r2, 0(%r2) | 53 ; CHECK: lg %r2, 0(%r2) |
54 ; CHECK: sg %r2, 0(%r3) | 54 ; CHECK: sg %r2, 0(%r3) |
55 ; CHECK: stg %r2, 0(%r4) | 55 ; CHECK: stg %r2, 0(%r4) |
56 ; CHECK: br %r14 | 56 ; CHECK: br %r14 |
57 %val1 = load i64 *%src1, align 1 | 57 %val1 = load i64 , i64 *%src1, align 1 |
58 %val2 = load i64 *%src2, align 2 | 58 %val2 = load i64 , i64 *%src2, align 2 |
59 %sub = sub i64 %val1, %val2 | 59 %sub = sub i64 %val1, %val2 |
60 store i64 %sub, i64 *%dst, align 4 | 60 store i64 %sub, i64 *%dst, align 4 |
61 ret i64 %sub | 61 ret i64 %sub |
62 } | 62 } |