diff test/CodeGen/AArch64/arm64-fmax.ll @ 95:afa8332a0e37

LLVM 3.8
author Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
date Tue, 13 Oct 2015 17:48:58 +0900
parents 54457678186b
children 1172e4bd9c6f
line wrap: on
line diff
--- a/test/CodeGen/AArch64/arm64-fmax.ll	Wed Feb 18 14:56:07 2015 +0900
+++ b/test/CodeGen/AArch64/arm64-fmax.ll	Tue Oct 13 17:48:58 2015 +0900
@@ -1,21 +1,33 @@
 ; RUN: llc -march=arm64 -enable-no-nans-fp-math < %s | FileCheck %s
 
-define double @test_direct(float %in) #1 {
+define double @test_direct(float %in) {
 ; CHECK-LABEL: test_direct:
-  %cmp = fcmp olt float %in, 0.000000e+00
-  %longer = fpext float %in to double
-  %val = select i1 %cmp, double 0.000000e+00, double %longer
-  ret double %val
+  %cmp = fcmp nnan olt float %in, 0.000000e+00
+  %val = select i1 %cmp, float 0.000000e+00, float %in
+  %longer = fpext float %val to double
+  ret double %longer
 
 ; CHECK: fmax
 }
 
-define double @test_cross(float %in) #1 {
+define double @test_cross(float %in) {
 ; CHECK-LABEL: test_cross:
-  %cmp = fcmp olt float %in, 0.000000e+00
-  %longer = fpext float %in to double
-  %val = select i1 %cmp, double %longer, double 0.000000e+00
-  ret double %val
+  %cmp = fcmp nnan ult float %in, 0.000000e+00
+  %val = select i1 %cmp, float %in, float 0.000000e+00
+  %longer = fpext float %val to double
+  ret double %longer
+
+; CHECK: fmin
+}
+
+; Same as previous, but with ordered comparison;
+; can't be converted in safe-math mode.
+define double @test_cross_fail_nan(float %in) {
+; CHECK-LABEL: test_cross_fail_nan:
+  %cmp = fcmp nnan olt float %in, 0.000000e+00
+  %val = select i1 %cmp, float %in, float 0.000000e+00
+  %longer = fpext float %val to double
+  ret double %longer
 
 ; CHECK: fmin
 }
@@ -24,11 +36,29 @@
 ; results. Make sure they're put back before we resort to the normal fcsel.
 define float @test_cross_fail(float %lhs, float %rhs) {
 ; CHECK-LABEL: test_cross_fail:
-  %tst = fcmp une float %lhs, %rhs
+  %tst = fcmp nnan une float %lhs, %rhs
   %res = select i1 %tst, float %rhs, float %lhs
   ret float %res
 
   ; The register allocator would have to decide to be deliberately obtuse before
   ; other register were used.
 ; CHECK: fcsel s0, s1, s0, ne
-}
\ No newline at end of file
+}
+
+; Make sure the transformation isn't triggered for integers
+define i64 @test_integer(i64  %in) {
+  %cmp = icmp slt i64 %in, 0
+  %val = select i1 %cmp, i64 0, i64 %in
+  ret i64 %val
+}
+
+define float @test_f16(half %in) {
+; CHECK-LABEL: test_f16:
+  %cmp = fcmp nnan ult half %in, 0.000000e+00
+  %val = select i1 %cmp, half %in, half 0.000000e+00
+  %longer = fpext half %val to float
+  ret float %longer
+; FIXME: It'd be nice for this to create an fmin instruction!
+; CHECK: fcvt
+; CHECK: fcsel
+}