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view test/CodeGen/ARM/2011-04-12-FastRegAlloc.ll @ 100:7d135dc70f03
LLVM 3.9
author | Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp> |
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date | Tue, 26 Jan 2016 22:53:40 +0900 |
parents | afa8332a0e37 |
children |
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; RUN: llc < %s -O0 -verify-machineinstrs -regalloc=fast ; Previously we'd crash as out of registers on this input by clobbering all of ; the aliases. target datalayout = "e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:32:32-f32:32:32-f64:32:32-v64:32:64-v128:32:128-a0:0:32-n32" target triple = "thumbv7-apple-darwin10.0.0" define void @_Z8TestCasev() nounwind ssp { entry: %a = alloca float, align 4 %tmp = load float, float* %a, align 4 call void asm sideeffect "", "w,~{s0},~{s16}"(float %tmp) nounwind, !srcloc !0 ret void } !0 = !{i32 109}