view test/CodeGen/AMDGPU/store-v3i32.ll @ 95:afa8332a0e37

LLVM 3.8
author Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
date Tue, 13 Oct 2015 17:48:58 +0900
parents test/CodeGen/R600/store-v3i32.ll@60c9769439b8
children
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; XFAIL: *
; RUN: llc -verify-machineinstrs -march=amdgcn -mcpu=SI < %s | FileCheck -check-prefix=SI %s
; RUN: llc -verify-machineinstrs -march=amdgcn -mcpu=tonga < %s | FileCheck -check-prefix=SI %s

; 3 vectors have the same size and alignment as 4 vectors, so this
; should be done in a single store.

; SI-LABEL: {{^}}store_v3i32:
; SI: buffer_store_dwordx4
define void @store_v3i32(<3 x i32> addrspace(1)* %out, <3 x i32> %a) nounwind {
  store <3 x i32> %a, <3 x i32> addrspace(1)* %out, align 16
  ret void
}