view test/CodeGen/Hexagon/absimm.ll @ 95:afa8332a0e37

LLVM 3.8
author Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
date Tue, 13 Oct 2015 17:48:58 +0900
parents 95c75e76d11b
children
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; RUN: llc -march=hexagon < %s | FileCheck %s
; Check that we generate absolute addressing mode instructions
; with immediate value.

define i32 @f1(i32 %i) nounwind {
; CHECK: memw(##786432){{ *}}={{ *}}r{{[0-9]+}}
entry:
  store volatile i32 %i, i32* inttoptr (i32 786432 to i32*), align 262144
  ret i32 %i
}

define i32* @f2(i32* nocapture %i) nounwind {
entry:
; CHECK: r{{[0-9]+}}{{ *}}={{ *}}memw(##786432)
  %0 = load volatile i32, i32* inttoptr (i32 786432 to i32*), align 262144
  %1 = inttoptr i32 %0 to i32*
  ret i32* %1
  }