view test/CodeGen/X86/vec_ext_inreg.ll @ 33:e4204d083e25

LLVM 3.5
author Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
date Thu, 12 Dec 2013 14:32:10 +0900
parents 95c75e76d11b
children 1172e4bd9c6f
line wrap: on
line source

; RUN: llc < %s -march=x86-64 

define <8 x i32> @a(<8 x i32> %a) nounwind {
  %b = trunc <8 x i32> %a to <8 x i16>
  %c = sext <8 x i16> %b to <8 x i32>
  ret <8 x i32> %c
}

define <3 x i32> @b(<3 x i32> %a) nounwind {
  %b = trunc <3 x i32> %a to <3 x i16>
  %c = sext <3 x i16> %b to <3 x i32>
  ret <3 x i32> %c
}

define <1 x i32> @c(<1 x i32> %a) nounwind {
  %b = trunc <1 x i32> %a to <1 x i16>
  %c = sext <1 x i16> %b to <1 x i32>
  ret <1 x i32> %c
}

define <8 x i32> @d(<8 x i32> %a) nounwind {
  %b = trunc <8 x i32> %a to <8 x i16>
  %c = zext <8 x i16> %b to <8 x i32>
  ret <8 x i32> %c
}

define <3 x i32> @e(<3 x i32> %a) nounwind {
  %b = trunc <3 x i32> %a to <3 x i16>
  %c = zext <3 x i16> %b to <3 x i32>
  ret <3 x i32> %c
}

define <1 x i32> @f(<1 x i32> %a) nounwind {
  %b = trunc <1 x i32> %a to <1 x i16>
  %c = zext <1 x i16> %b to <1 x i32>
  ret <1 x i32> %c
}