view test/CodeGen/X86/zext-inreg-1.ll @ 33:e4204d083e25

LLVM 3.5
author Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
date Thu, 12 Dec 2013 14:32:10 +0900
parents 95c75e76d11b
children 803732b1fca8
line wrap: on
line source

; RUN: llc < %s -march=x86 | not grep and

; These tests differ from the ones in zext-inreg-0.ll in that
; on x86-64 they do require and instructions.

; These should use movzbl instead of 'and 255'.
; This related to not having ZERO_EXTEND_REG node.

define i64 @l(i64 %d) nounwind  {
        %e = add i64 %d, 1
        %retval = and i64 %e, 1099511627775
        ret i64 %retval
}
define i64 @m(i64 %d) nounwind  {
        %e = add i64 %d, 1
        %retval = and i64 %e, 281474976710655
        ret i64 %retval
}