Mercurial > hg > Members > tobaru > cbc > CbC_llvm
view test/CodeGen/Mips/delay-slot-kill.ll @ 117:facf19d07cd9
check EHStack on EmitCall (CbC goto)
author | Shinji KONO <kono@ie.u-ryukyu.ac.jp> |
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date | Wed, 24 Aug 2016 20:10:41 +0900 |
parents | afa8332a0e37 |
children |
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; RUN: llc < %s -march=mips64 -mcpu=mips3 | FileCheck %s ; We have to XFAIL this temporarily because of the reversion of r229675. ; XFAIL: * ; Currently, the following IR assembly generates a KILL instruction between ; the bitwise-and instruction and the return instruction. We verify that the ; delay slot filler ignores such KILL instructions by filling the slot of the ; return instruction properly. define signext i32 @f1(i32 signext %a, i32 signext %b) { entry: ; CHECK: jr $ra ; CHECK-NEXT: and $2, $4, $5 %r = and i32 %a, %b ret i32 %r }