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view presen/code/reg.ll.txt @ 10:99e1c7d2acee

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add presentation
author Ryoma SHINYA <shinya@firefly.cr.ie.u-ryukyu.ac.jp>
date Thu, 06 Jan 2011 22:35:43 +0900
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; ModuleID = 'DFA'
global [4 x i8] c"ABC\00"		; <[4 x i8]*>:0 [#uses=4]
global [28 x i8] c"state: %s, arg: %c(int %d)\0A\00"		; <[28 x i8]*>:1 [#uses=0]

define i32 @accept(i32 %index) {
entry:
	ret i32 1
}

define i32 @reject(i32 %index) {
entry:
	ret i32 0
}

define i32 @"8"(i32 %index) {
entry:
	%0 = getelementptr [4 x i8]* @0, i32 0, i32 %index		; <i8*> [#uses=1]
	%1 = add i32 %index, 1		; <i32> [#uses=2]
	%2 = load i8* %0		; <i8> [#uses=1]
	switch i8 %2, label %default [
		i8 0, label %case0
	]

default:		; preds = %entry
	%3 = call i32 @reject(i32 %1)		; <i32> [#uses=1]
	ret i32 %3

case0:		; preds = %entry
	%4 = call i32 @accept(i32 %1)		; <i32> [#uses=1]
	ret i32 %4
}

define i32 @"1_3_5_6_7"(i32 %index) {
entry:
	%0 = getelementptr [4 x i8]* @0, i32 0, i32 %index		; <i8*> [#uses=1]
	%1 = add i32 %index, 1		; <i32> [#uses=4]
	%2 = load i8* %0		; <i8> [#uses=1]
	switch i8 %2, label %default [
		i8 65, label %case0
		i8 67, label %case1
		i8 66, label %case2
	]

default:		; preds = %entry
	%3 = call i32 @reject(i32 %1)		; <i32> [#uses=1]
	ret i32 %3

case0:		; preds = %entry
	%4 = call i32 @"1_2_3_5_7"(i32 %1)		; <i32> [#uses=1]
	ret i32 %4

case1:		; preds = %entry
	%5 = call i32 @"8"(i32 %1)		; <i32> [#uses=1]
	ret i32 %5

case2:		; preds = %entry
	%6 = call i32 @"1_3_4_5_7"(i32 %1)		; <i32> [#uses=1]
	ret i32 %6
}

define i32 @"1_3_4_5_7"(i32 %index) {
entry:
	%0 = getelementptr [4 x i8]* @0, i32 0, i32 %index		; <i8*> [#uses=1]
	%1 = add i32 %index, 1		; <i32> [#uses=4]
	%2 = load i8* %0		; <i8> [#uses=1]
	switch i8 %2, label %default [
		i8 65, label %case0
		i8 67, label %case1
		i8 66, label %case2
	]

default:		; preds = %entry
	%3 = call i32 @reject(i32 %1)		; <i32> [#uses=1]
	ret i32 %3

case0:		; preds = %entry
	%4 = call i32 @"1_2_3_5_7"(i32 %1)		; <i32> [#uses=1]
	ret i32 %4

case1:		; preds = %entry
	%5 = call i32 @"8"(i32 %1)		; <i32> [#uses=1]
	ret i32 %5

case2:		; preds = %entry
	%6 = call i32 @"1_3_4_5_7"(i32 %1)		; <i32> [#uses=1]
	ret i32 %6
}

define i32 @"1_2_3_5_7"(i32 %index) {
entry:
	%0 = getelementptr [4 x i8]* @0, i32 0, i32 %index		; <i8*> [#uses=1]
	%1 = add i32 %index, 1		; <i32> [#uses=4]
	%2 = load i8* %0		; <i8> [#uses=1]
	switch i8 %2, label %default [
		i8 65, label %case0
		i8 67, label %case1
		i8 66, label %case2
	]

default:		; preds = %entry
	%3 = call i32 @reject(i32 %1)		; <i32> [#uses=1]
	ret i32 %3

case0:		; preds = %entry
	%4 = call i32 @"1_2_3_5_7"(i32 %1)		; <i32> [#uses=1]
	ret i32 %4

case1:		; preds = %entry
	%5 = call i32 @"8"(i32 %1)		; <i32> [#uses=1]
	ret i32 %5

case2:		; preds = %entry
	%6 = call i32 @"1_3_4_5_7"(i32 %1)		; <i32> [#uses=1]
	ret i32 %6
}

define i32 @unitmain(i32 %index) {
entry:
	%0 = call i32 @"1_3_5_6_7"(i32 %index)		; <i32> [#uses=1]
	ret i32 %0
}