Mercurial > hg > Papers > 2015 > yuhi-master
comparison paper/master_paper.toc @ 19:79d16cee0afd
Benchmark gpu.minor fix abstruct
author | Yuhi TOMARI <yuhi@cr.ie.u-ryukyu.ac.jp> |
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date | Fri, 13 Feb 2015 09:29:41 +0900 |
parents | d7cf4a51597f |
children | bd42a79ab49a |
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1 \contentsline {chapter}{\numberline {第1章}研究目的と背景}{1} | 1 \contentsline {chapter}{\numberline {第1章}フレームワークにおけるマルチプラットフォーム対応の必要性}{1} |
2 \contentsline {section}{\numberline {1.1}本論文の構成}{2} | 2 \contentsline {chapter}{\numberline {第2章}既存のマルチプラットフォームフレームワーク}{2} |
3 \contentsline {chapter}{\numberline {第2章}既存のマルチプラットフォームフレームワーク}{3} | 3 \contentsline {section}{\numberline {2.1}Architecture}{2} |
4 \contentsline {section}{\numberline {2.1}Architecutre}{3} | 4 \contentsline {section}{\numberline {2.2}Shared Memory}{2} |
5 \contentsline {section}{\numberline {2.2}Shared Memory}{3} | 5 \contentsline {section}{\numberline {2.3}OpenCL}{4} |
6 \contentsline {section}{\numberline {2.3}OpenCL}{5} | 6 \contentsline {section}{\numberline {2.4}CUDA}{6} |
7 \contentsline {section}{\numberline {2.4}CUDA}{7} | 7 \contentsline {section}{\numberline {2.5}StarPU}{7} |
8 \contentsline {section}{\numberline {2.5}StarPU}{8} | 8 \contentsline {chapter}{\numberline {第3章}並列プログラミングフレームワーク Cerium}{9} |
9 \contentsline {chapter}{\numberline {第3章}Cerium}{10} | 9 \contentsline {section}{\numberline {3.1}Cerium の概要}{9} |
10 \contentsline {section}{\numberline {3.1}Cerium の概要}{10} | 10 \contentsline {section}{\numberline {3.2}Cerium TaskManager}{9} |
11 \contentsline {section}{\numberline {3.2}Cerium TaskManager}{10} | 11 \contentsline {section}{\numberline {3.3}Cerium における Task}{10} |
12 \contentsline {section}{\numberline {3.3}Cerium における Task}{11} | 12 \contentsline {section}{\numberline {3.4}Task の Scheduling}{10} |
13 \contentsline {section}{\numberline {3.4}Task の Scheduling}{11} | 13 \contentsline {section}{\numberline {3.5}Task 生成の例}{11} |
14 \contentsline {section}{\numberline {3.5}Task 生成の例}{12} | 14 \contentsline {chapter}{\numberline {第4章}Ceriumを用いた例題}{13} |
15 \contentsline {chapter}{\numberline {第4章}Ceriumを用いた例題}{14} | 15 \contentsline {section}{\numberline {4.1}Bitonic Sort}{13} |
16 \contentsline {section}{\numberline {4.1}Bitonic Sort}{14} | 16 \contentsline {section}{\numberline {4.2}Word Count}{15} |
17 \contentsline {section}{\numberline {4.2}Word Count}{16} | 17 \contentsline {section}{\numberline {4.3}FFT}{17} |
18 \contentsline {section}{\numberline {4.3}FFT}{18} | 18 \contentsline {chapter}{\numberline {第5章}マルチコアへの対応}{18} |
19 \contentsline {chapter}{\numberline {第5章}マルチコアへの対応}{19} | 19 \contentsline {section}{\numberline {5.1}マルチコア上での実行の機構}{18} |
20 \contentsline {section}{\numberline {5.1}マルチコア上での実行の機構}{19} | 20 \contentsline {section}{\numberline {5.2}DMA}{18} |
21 \contentsline {section}{\numberline {5.2}DMA}{19} | 21 \contentsline {chapter}{\numberline {第6章}GPGPU への対応}{19} |
22 \contentsline {chapter}{\numberline {第6章}GPGPU への対応}{20} | 22 \contentsline {section}{\numberline {6.1}OpenCL および CUDA による実装}{19} |
23 \contentsline {section}{\numberline {6.1}OpenCL および CUDA による実装}{20} | 23 \contentsline {section}{\numberline {6.2}データ並列}{20} |
24 \contentsline {section}{\numberline {6.2}データ並列}{21} | 24 \contentsline {chapter}{\numberline {第7章}並列処理向けI/O}{23} |
25 \contentsline {chapter}{\numberline {第7章}並列処理向けI/O}{24} | 25 \contentsline {section}{\numberline {7.1}mmap}{23} |
26 \contentsline {section}{\numberline {7.1}mmap}{24} | 26 \contentsline {section}{\numberline {7.2}Blocked Read による I/O の並列化}{24} |
27 \contentsline {section}{\numberline {7.2}Blocked Read による I/O の並列化}{25} | 27 \contentsline {section}{\numberline {7.3}I/O 専用 Thread の実装}{26} |
28 \contentsline {section}{\numberline {7.3}I/O 専用 Thread の実装}{27} | 28 \contentsline {chapter}{\numberline {第8章}ベンチマーク}{27} |
29 \contentsline {chapter}{\numberline {第8章}Memory Allocator}{28} | 29 \contentsline {section}{\numberline {8.1}実験環境}{27} |
30 \contentsline {section}{\numberline {8.1}現状のMemory Allocator}{28} | 30 \contentsline {section}{\numberline {8.2}マルチコア}{28} |
31 \contentsline {section}{\numberline {8.2}新しいMemory Allocator}{28} | 31 \contentsline {section}{\numberline {8.3}GPGPU}{29} |
32 \contentsline {chapter}{\numberline {第9章}ベンチマーク}{29} | 32 \contentsline {section}{\numberline {8.4}並列 I/O}{30} |
33 \contentsline {section}{\numberline {9.1}実験環境}{29} | 33 \contentsline {chapter}{\numberline {第9章}既存のプログラミングフレームワークとの比較}{31} |
34 \contentsline {section}{\numberline {9.2}マルチコア}{30} | 34 \contentsline {section}{\numberline {9.1}OpenCL}{31} |
35 \contentsline {section}{\numberline {9.3}GPGPU}{30} | 35 \contentsline {section}{\numberline {9.2}CUDA}{31} |
36 \contentsline {section}{\numberline {9.4}並列 I/O}{30} | 36 \contentsline {section}{\numberline {9.3}StarPU}{31} |
37 \contentsline {chapter}{\numberline {第10章}結論}{32} | 37 \contentsline {chapter}{\numberline {第10章}結論}{32} |
38 \contentsline {section}{\numberline {10.1}まとめ}{32} | 38 \contentsline {section}{\numberline {10.1}まとめ}{32} |
39 \contentsline {section}{\numberline {10.2}今後の課題}{32} | 39 \contentsline {section}{\numberline {10.2}今後の課題}{32} |
40 \contentsline {chapter}{謝辞}{33} | 40 \contentsline {chapter}{謝辞}{33} |
41 \contentsline {chapter}{参考文献}{34} | 41 \contentsline {chapter}{参考文献}{34} |