diff paper/master_paper.toc @ 7:786db8c94c6e

Bitonic sort example
author Yuhi TOMARI <yuhi@cr.ie.u-ryukyu.ac.jp>
date Thu, 22 Jan 2015 11:14:42 +0900
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+++ b/paper/master_paper.toc	Thu Jan 22 11:14:42 2015 +0900
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+\contentsline {chapter}{\numberline {第1章}研究目的と背景}{1}
+\contentsline {section}{\numberline {1.1}本論文の構成}{2}
+\contentsline {chapter}{\numberline {第2章}既存のマルチプラットフォームフレームワーク}{3}
+\contentsline {section}{\numberline {2.1}OpenCL}{3}
+\contentsline {subsection}{\numberline {2.1.1}Command Queue}{3}
+\contentsline {subsection}{\numberline {2.1.2}メモリアクセス}{3}
+\contentsline {subsection}{\numberline {2.1.3}データ並列}{5}
+\contentsline {subsection}{\numberline {2.1.4}ワークグループ}{5}
+\contentsline {section}{\numberline {2.2}CUDA}{6}
+\contentsline {subsection}{\numberline {2.2.1}Stream}{7}
+\contentsline {subsection}{\numberline {2.2.2}データ並列}{7}
+\contentsline {section}{\numberline {2.3}StarPU}{8}
+\contentsline {subsection}{\numberline {2.3.1}codelet}{8}
+\contentsline {subsection}{\numberline {2.3.2}データ並列}{8}
+\contentsline {chapter}{\numberline {第3章}Cerium}{11}
+\contentsline {section}{\numberline {3.1}Cerium の概要}{11}
+\contentsline {section}{\numberline {3.2}Cerium TaskManager}{11}
+\contentsline {section}{\numberline {3.3}Cerium における Task}{12}
+\contentsline {section}{\numberline {3.4}Task の Scheduling}{12}
+\contentsline {section}{\numberline {3.5}Task 生成の例}{13}
+\contentsline {chapter}{\numberline {第4章}Ceriumを用いた例題}{15}
+\contentsline {section}{\numberline {4.1}Bitonic Sort}{15}
+\contentsline {section}{\numberline {4.2}Word Count}{16}
+\contentsline {section}{\numberline {4.3}FFT}{16}
+\contentsline {chapter}{\numberline {第5章}マルチコアへの対応}{17}
+\contentsline {section}{\numberline {5.1}マルチコア上での実行の機構}{17}
+\contentsline {section}{\numberline {5.2}ベンチマーク}{17}
+\contentsline {chapter}{\numberline {第6章}GPGPUへの対応}{18}
+\contentsline {section}{\numberline {6.1}OpenCL}{18}
+\contentsline {subsection}{\numberline {6.1.1}OpenCL による実装の機構}{18}
+\contentsline {subsection}{\numberline {6.1.2}ベンチマーク}{18}
+\contentsline {section}{\numberline {6.2}CUDA}{18}
+\contentsline {subsection}{\numberline {6.2.1}CUDA による実装の機構}{18}
+\contentsline {subsection}{\numberline {6.2.2}ベンチマーク}{18}
+\contentsline {section}{\numberline {6.3}データ並列}{18}
+\contentsline {subsection}{\numberline {6.3.1}データ並列実行の機構}{18}
+\contentsline {subsection}{\numberline {6.3.2}iterate API}{18}
+\contentsline {subsection}{\numberline {6.3.3}ベンチマーク}{18}
+\contentsline {chapter}{\numberline {第7章}並列処理向けI/O}{19}
+\contentsline {section}{\numberline {7.1}新たに実装したI/Oの機構}{19}
+\contentsline {section}{\numberline {7.2}ベンチマーク}{19}
+\contentsline {chapter}{\numberline {第8章}Memory Allocator}{20}
+\contentsline {section}{\numberline {8.1}現状のMemory Allocator}{20}
+\contentsline {section}{\numberline {8.2}新しいMemory Allocator}{20}
+\contentsline {section}{\numberline {8.3}ベンチマーク}{20}
+\contentsline {chapter}{\numberline {第9章}結論}{21}
+\contentsline {section}{\numberline {9.1}まとめ}{21}
+\contentsline {section}{\numberline {9.2}今後の課題}{21}
+\contentsline {chapter}{謝辞}{22}
+\contentsline {chapter}{参考文献}{23}
+\contentsline {chapter}{発表文献}{24}