\contentsline {chapter}{\numberline {第1章}研究目的と背景}{1}
\contentsline {section}{\numberline {1.1}本論文の構成}{2}
\contentsline {chapter}{\numberline {第2章}既存のマルチプラットフォームフレームワーク}{3}
\contentsline {section}{\numberline {2.1}Architecutre}{3}
\contentsline {section}{\numberline {2.2}Shared Memory}{3}
\contentsline {section}{\numberline {2.3}OpenCL}{5}
\contentsline {section}{\numberline {2.4}CUDA}{7}
\contentsline {section}{\numberline {2.5}StarPU}{8}
\contentsline {chapter}{\numberline {第3章}Cerium}{10}
\contentsline {section}{\numberline {3.1}Cerium の概要}{10}
\contentsline {section}{\numberline {3.2}Cerium TaskManager}{10}
\contentsline {section}{\numberline {3.3}Cerium における Task}{11}
\contentsline {section}{\numberline {3.4}Task の Scheduling}{11}
\contentsline {section}{\numberline {3.5}Task 生成の例}{12}
\contentsline {chapter}{\numberline {第4章}Ceriumを用いた例題}{14}
\contentsline {section}{\numberline {4.1}Bitonic Sort}{14}
\contentsline {section}{\numberline {4.2}Word Count}{16}
\contentsline {section}{\numberline {4.3}FFT}{18}
\contentsline {chapter}{\numberline {第5章}マルチコアへの対応}{19}
\contentsline {section}{\numberline {5.1}マルチコア上での実行の機構}{19}
\contentsline {section}{\numberline {5.2}DMA}{19}
\contentsline {chapter}{\numberline {第6章}GPGPU への対応}{20}
\contentsline {section}{\numberline {6.1}OpenCL および CUDA による実装}{20}
\contentsline {section}{\numberline {6.2}データ並列}{21}
\contentsline {chapter}{\numberline {第7章}並列処理向けI/O}{24}
\contentsline {section}{\numberline {7.1}新たに実装したI/Oの機構}{24}
\contentsline {chapter}{\numberline {第8章}Memory Allocator}{25}
\contentsline {section}{\numberline {8.1}現状のMemory Allocator}{25}
\contentsline {section}{\numberline {8.2}新しいMemory Allocator}{25}
\contentsline {chapter}{\numberline {第9章}ベンチマーク}{26}
\contentsline {chapter}{\numberline {第10章}結論}{27}
\contentsline {section}{\numberline {10.1}まとめ}{27}
\contentsline {section}{\numberline {10.2}今後の課題}{27}
\contentsline {chapter}{謝辞}{28}
\contentsline {chapter}{参考文献}{29}
\contentsline {chapter}{発表文献}{30}