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1 ; Options for the MIPS port of the compiler
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2 ;
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3 ; Copyright (C) 2005, 2007, 2008 Free Software Foundation, Inc.
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4 ;
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5 ; This file is part of GCC.
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6 ;
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7 ; GCC is free software; you can redistribute it and/or modify it under
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8 ; the terms of the GNU General Public License as published by the Free
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9 ; Software Foundation; either version 3, or (at your option) any later
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10 ; version.
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11 ;
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12 ; GCC is distributed in the hope that it will be useful, but WITHOUT
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13 ; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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14 ; or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
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15 ; License for more details.
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16 ;
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17 ; You should have received a copy of the GNU General Public License
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18 ; along with GCC; see the file COPYING3. If not see
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19 ; <http://www.gnu.org/licenses/>.
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20
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21 mabi=
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22 Target RejectNegative Joined
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23 -mabi=ABI Generate code that conforms to the given ABI
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24
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25 mabicalls
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26 Target Report Mask(ABICALLS)
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27 Generate code that can be used in SVR4-style dynamic objects
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28
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29 mad
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30 Target Report Var(TARGET_MAD)
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31 Use PMC-style 'mad' instructions
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32
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33 march=
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34 Target RejectNegative Joined Var(mips_arch_string)
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35 -march=ISA Generate code for the given ISA
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36
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37 mbranch-cost=
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38 Target RejectNegative Joined UInteger Var(mips_branch_cost)
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39 -mbranch-cost=COST Set the cost of branches to roughly COST instructions
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40
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41 mbranch-likely
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42 Target Report Mask(BRANCHLIKELY)
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43 Use Branch Likely instructions, overriding the architecture default
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44
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45 mflip-mips16
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46 Target Report Var(TARGET_FLIP_MIPS16)
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47 Switch on/off MIPS16 ASE on alternating functions for compiler testing
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48
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49 mcheck-zero-division
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50 Target Report Mask(CHECK_ZERO_DIV)
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51 Trap on integer divide by zero
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52
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53 mcode-readable=
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54 Target RejectNegative Joined
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55 -mcode-readable=SETTING Specify when instructions are allowed to access code
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56
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57 mdivide-breaks
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58 Target Report RejectNegative Mask(DIVIDE_BREAKS)
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59 Use branch-and-break sequences to check for integer divide by zero
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60
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61 mdivide-traps
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62 Target Report RejectNegative InverseMask(DIVIDE_BREAKS, DIVIDE_TRAPS)
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63 Use trap instructions to check for integer divide by zero
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64
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65 mdmx
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66 Target Report RejectNegative Var(TARGET_MDMX)
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67 Allow the use of MDMX instructions
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68
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69 mdouble-float
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70 Target Report RejectNegative InverseMask(SINGLE_FLOAT, DOUBLE_FLOAT)
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71 Allow hardware floating-point instructions to cover both 32-bit and 64-bit operations
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72
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73 mdsp
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74 Target Report Mask(DSP)
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75 Use MIPS-DSP instructions
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76
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77 mdspr2
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78 Target Report Mask(DSPR2)
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79 Use MIPS-DSP REV 2 instructions
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80
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81 mdebug
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82 Target Var(TARGET_DEBUG_MODE) Undocumented
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83
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84 mdebugd
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85 Target Var(TARGET_DEBUG_D_MODE) Undocumented
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86
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87 meb
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88 Target Report RejectNegative Mask(BIG_ENDIAN)
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89 Use big-endian byte order
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90
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91 mel
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92 Target Report RejectNegative InverseMask(BIG_ENDIAN, LITTLE_ENDIAN)
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93 Use little-endian byte order
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94
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95 membedded-data
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96 Target Report Var(TARGET_EMBEDDED_DATA)
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97 Use ROM instead of RAM
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98
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99 mexplicit-relocs
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100 Target Report Mask(EXPLICIT_RELOCS)
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101 Use NewABI-style %reloc() assembly operators
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102
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103 mextern-sdata
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104 Target Report Var(TARGET_EXTERN_SDATA) Init(1)
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105 Use -G for data that is not defined by the current object
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106
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107 mfix-r4000
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108 Target Report Mask(FIX_R4000)
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109 Work around certain R4000 errata
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110
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111 mfix-r4400
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112 Target Report Mask(FIX_R4400)
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113 Work around certain R4400 errata
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114
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115 mfix-r10000
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116 Target Report Mask(FIX_R10000)
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117 Work around certain R10000 errata
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118
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119 mfix-sb1
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120 Target Report Var(TARGET_FIX_SB1)
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121 Work around errata for early SB-1 revision 2 cores
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122
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123 mfix-vr4120
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124 Target Report Var(TARGET_FIX_VR4120)
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125 Work around certain VR4120 errata
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126
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127 mfix-vr4130
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128 Target Report Var(TARGET_FIX_VR4130)
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129 Work around VR4130 mflo/mfhi errata
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130
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131 mfix4300
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132 Target Report Var(TARGET_4300_MUL_FIX)
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133 Work around an early 4300 hardware bug
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134
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135 mfp-exceptions
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136 Target Report Mask(FP_EXCEPTIONS)
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137 FP exceptions are enabled
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138
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139 mfp32
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140 Target Report RejectNegative InverseMask(FLOAT64)
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141 Use 32-bit floating-point registers
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142
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143 mfp64
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144 Target Report RejectNegative Mask(FLOAT64)
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145 Use 64-bit floating-point registers
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146
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147 mflush-func=
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148 Target RejectNegative Joined Var(mips_cache_flush_func) Init(CACHE_FLUSH_FUNC)
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149 -mflush-func=FUNC Use FUNC to flush the cache before calling stack trampolines
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150
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151 mfused-madd
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152 Target Report Mask(FUSED_MADD)
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153 Generate floating-point multiply-add instructions
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154
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155 mgp32
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156 Target Report RejectNegative InverseMask(64BIT)
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157 Use 32-bit general registers
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158
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159 mgp64
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160 Target Report RejectNegative Mask(64BIT)
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161 Use 64-bit general registers
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162
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163 mgpopt
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164 Target Report Var(TARGET_GPOPT) Init(1)
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165 Use GP-relative addressing to access small data
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166
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167 mplt
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168 Target Report Var(TARGET_PLT)
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169 When generating -mabicalls code, allow executables to use PLTs and copy relocations
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170
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171 mhard-float
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172 Target Report RejectNegative InverseMask(SOFT_FLOAT_ABI, HARD_FLOAT_ABI)
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173 Allow the use of hardware floating-point ABI and instructions
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174
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175 minterlink-mips16
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176 Target Report Var(TARGET_INTERLINK_MIPS16) Init(0)
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177 Generate code that can be safely linked with MIPS16 code.
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178
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179 mips
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180 Target RejectNegative Joined
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181 -mipsN Generate code for ISA level N
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182
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183 mips16
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184 Target Report RejectNegative Mask(MIPS16)
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185 Generate MIPS16 code
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186
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187 mips3d
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188 Target Report RejectNegative Mask(MIPS3D)
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189 Use MIPS-3D instructions
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190
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191 mllsc
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192 Target Report Mask(LLSC)
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193 Use ll, sc and sync instructions
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194
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195 mlocal-sdata
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196 Target Report Var(TARGET_LOCAL_SDATA) Init(1)
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197 Use -G for object-local data
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198
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199 mlong-calls
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200 Target Report Var(TARGET_LONG_CALLS)
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201 Use indirect calls
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202
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203 mlong32
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204 Target Report RejectNegative InverseMask(LONG64, LONG32)
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205 Use a 32-bit long type
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206
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207 mlong64
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208 Target Report RejectNegative Mask(LONG64)
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209 Use a 64-bit long type
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210
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211 mmemcpy
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212 Target Report Mask(MEMCPY)
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213 Don't optimize block moves
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214
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215 mmips-tfile
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216 Target
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217 Use the mips-tfile postpass
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218
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219 mmt
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220 Target Report Var(TARGET_MT)
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221 Allow the use of MT instructions
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222
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223 mno-flush-func
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224 Target RejectNegative
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225 Do not use a cache-flushing function before calling stack trampolines
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226
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227 mno-mdmx
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228 Target Report RejectNegative InverseVar(MDMX)
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229 Do not use MDMX instructions
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230
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231 mno-mips16
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232 Target Report RejectNegative InverseMask(MIPS16)
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233 Generate normal-mode code
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234
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235 mno-mips3d
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236 Target Report RejectNegative InverseMask(MIPS3D)
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237 Do not use MIPS-3D instructions
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238
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239 mpaired-single
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240 Target Report Mask(PAIRED_SINGLE_FLOAT)
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241 Use paired-single floating-point instructions
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242
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243 mr10k-cache-barrier=
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244 Target Joined RejectNegative
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245 -mr10k-cache-barrier=SETTING Specify when r10k cache barriers should be inserted
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246
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247 mshared
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248 Target Report Var(TARGET_SHARED) Init(1)
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249 When generating -mabicalls code, make the code suitable for use in shared libraries
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250
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251 msingle-float
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252 Target Report RejectNegative Mask(SINGLE_FLOAT)
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253 Restrict the use of hardware floating-point instructions to 32-bit operations
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254
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255 msmartmips
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256 Target Report Mask(SMARTMIPS)
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257 Use SmartMIPS instructions
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258
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259 msoft-float
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260 Target Report RejectNegative Mask(SOFT_FLOAT_ABI)
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261 Prevent the use of all hardware floating-point instructions
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262
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263 msplit-addresses
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264 Target Report Mask(SPLIT_ADDRESSES)
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265 Optimize lui/addiu address loads
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266
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267 msym32
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268 Target Report Var(TARGET_SYM32)
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269 Assume all symbols have 32-bit values
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270
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271 mtune=
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272 Target RejectNegative Joined Var(mips_tune_string)
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273 -mtune=PROCESSOR Optimize the output for PROCESSOR
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274
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275 muninit-const-in-rodata
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276 Target Report Var(TARGET_UNINIT_CONST_IN_RODATA)
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277 Put uninitialized constants in ROM (needs -membedded-data)
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278
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279 mvr4130-align
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280 Target Report Mask(VR4130_ALIGN)
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281 Perform VR4130-specific alignment optimizations
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282
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283 mxgot
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284 Target Report Var(TARGET_XGOT)
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285 Lift restrictions on GOT size
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