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1 ;; Constraint definitions for RS6000
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2 ;; Copyright (C) 2006, 2007 Free Software Foundation, Inc.
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3 ;;
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4 ;; This file is part of GCC.
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5 ;;
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6 ;; GCC is free software; you can redistribute it and/or modify
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7 ;; it under the terms of the GNU General Public License as published by
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8 ;; the Free Software Foundation; either version 3, or (at your option)
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9 ;; any later version.
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10 ;;
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11 ;; GCC is distributed in the hope that it will be useful,
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12 ;; but WITHOUT ANY WARRANTY; without even the implied warranty of
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13 ;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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14 ;; GNU General Public License for more details.
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15 ;;
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16 ;; You should have received a copy of the GNU General Public License
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17 ;; along with GCC; see the file COPYING3. If not see
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18 ;; <http://www.gnu.org/licenses/>.
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19
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20 ;; Register constraints
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21
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22 (define_register_constraint "f" "TARGET_HARD_FLOAT && TARGET_FPRS
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23 ? FLOAT_REGS : NO_REGS"
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24 "@internal")
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25
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26 (define_register_constraint "b" "BASE_REGS"
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27 "@internal")
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28
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29 (define_register_constraint "h" "SPECIAL_REGS"
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30 "@internal")
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31
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32 (define_register_constraint "q" "MQ_REGS"
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33 "@internal")
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34
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35 (define_register_constraint "c" "CTR_REGS"
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36 "@internal")
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37
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38 (define_register_constraint "l" "LINK_REGS"
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39 "@internal")
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40
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41 (define_register_constraint "v" "ALTIVEC_REGS"
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42 "@internal")
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43
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44 (define_register_constraint "x" "CR0_REGS"
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45 "@internal")
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46
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47 (define_register_constraint "y" "CR_REGS"
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48 "@internal")
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49
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50 (define_register_constraint "z" "XER_REGS"
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51 "@internal")
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52
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53 ;; Integer constraints
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54
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55 (define_constraint "I"
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56 "A signed 16-bit constant"
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57 (and (match_code "const_int")
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58 (match_test "(unsigned HOST_WIDE_INT) (ival + 0x8000) < 0x10000")))
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59
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60 (define_constraint "J"
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61 "high-order 16 bits nonzero"
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62 (and (match_code "const_int")
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63 (match_test "(ival & (~ (unsigned HOST_WIDE_INT) 0xffff0000)) == 0")))
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64
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65 (define_constraint "K"
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66 "low-order 16 bits nonzero"
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67 (and (match_code "const_int")
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68 (match_test "(ival & (~ (HOST_WIDE_INT) 0xffff)) == 0")))
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69
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70 (define_constraint "L"
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71 "signed 16-bit constant shifted left 16 bits"
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72 (and (match_code "const_int")
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73 (match_test "((ival & 0xffff) == 0
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74 && (ival >> 31 == -1 || ival >> 31 == 0))")))
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75
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76 (define_constraint "M"
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77 "constant greater than 31"
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78 (and (match_code "const_int")
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79 (match_test "ival > 31")))
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80
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81 (define_constraint "N"
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82 "positive constant that is an exact power of two"
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83 (and (match_code "const_int")
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84 (match_test "ival > 0 && exact_log2 (ival) >= 0")))
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85
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86 (define_constraint "O"
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87 "constant zero"
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88 (and (match_code "const_int")
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89 (match_test "ival == 0")))
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90
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91 (define_constraint "P"
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92 "constant whose negation is signed 16-bit constant"
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93 (and (match_code "const_int")
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94 (match_test "(unsigned HOST_WIDE_INT) ((- ival) + 0x8000) < 0x10000")))
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95
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96 ;; Floating-point constraints
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97
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98 (define_constraint "G"
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99 "Constant that can be copied into GPR with two insns for DF/DI
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100 and one for SF."
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101 (and (match_code "const_double")
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102 (match_test "num_insns_constant (op, mode)
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103 == (mode == SFmode ? 1 : 2)")))
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104
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105 (define_constraint "H"
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106 "DF/DI constant that takes three insns."
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107 (and (match_code "const_double")
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108 (match_test "num_insns_constant (op, mode) == 3")))
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109
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110 ;; Memory constraints
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111
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112 (define_memory_constraint "Q"
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113 "Memory operand that is just an offset from a reg"
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114 (and (match_code "mem")
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115 (match_test "GET_CODE (XEXP (op, 0)) == REG")))
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116
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117 (define_memory_constraint "Y"
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118 "Indexed or word-aligned displacement memory operand"
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119 (match_operand 0 "word_offset_memref_operand"))
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120
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121 (define_memory_constraint "Z"
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122 "Indexed or indirect memory operand"
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123 (match_operand 0 "indexed_or_indirect_operand"))
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124
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125 ;; Address constraints
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126
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127 (define_address_constraint "a"
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128 "Indexed or indirect address operand"
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129 (match_operand 0 "indexed_or_indirect_address"))
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130
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131 (define_constraint "R"
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132 "AIX TOC entry"
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133 (match_test "legitimate_constant_pool_address_p (op)"))
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134
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135 ;; General constraints
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136
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137 (define_constraint "S"
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138 "Constant that can be placed into a 64-bit mask operand"
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139 (match_operand 0 "mask64_operand"))
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140
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141 (define_constraint "T"
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142 "Constant that can be placed into a 32-bit mask operand"
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143 (match_operand 0 "mask_operand"))
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144
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145 (define_constraint "U"
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146 "V.4 small data reference"
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147 (and (match_test "DEFAULT_ABI == ABI_V4")
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148 (match_operand 0 "small_data_operand")))
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149
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150 (define_constraint "t"
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151 "AND masks that can be performed by two rldic{l,r} insns
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152 (but excluding those that could match other constraints of anddi3)"
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153 (and (and (and (match_operand 0 "mask64_2_operand")
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154 (match_test "(fixed_regs[CR0_REGNO]
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155 || !logical_operand (op, DImode))"))
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156 (not (match_operand 0 "mask_operand")))
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157 (not (match_operand 0 "mask64_operand"))))
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158
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159 (define_constraint "W"
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160 "vector constant that does not require memory"
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161 (match_operand 0 "easy_vector_constant"))
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