annotate lib/CodeGen/LiveIntervalAnalysis.cpp @ 120:1172e4bd9c6f

update 4.0.0
author mir3636
date Fri, 25 Nov 2016 19:14:25 +0900
parents 7d135dc70f03
children 803732b1fca8
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1 //===-- LiveIntervalAnalysis.cpp - Live Interval Analysis -----------------===//
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2 //
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3 // The LLVM Compiler Infrastructure
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4 //
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5 // This file is distributed under the University of Illinois Open Source
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6 // License. See LICENSE.TXT for details.
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7 //
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8 //===----------------------------------------------------------------------===//
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9 //
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10 // This file implements the LiveInterval analysis pass which is used
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11 // by the Linear Scan Register allocator. This pass linearizes the
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12 // basic blocks of the function in DFS order and computes live intervals for
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13 // each virtual and physical register.
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14 //
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15 //===----------------------------------------------------------------------===//
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16
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17 #include "llvm/CodeGen/LiveIntervalAnalysis.h"
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18 #include "LiveRangeCalc.h"
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19 #include "llvm/ADT/STLExtras.h"
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20 #include "llvm/Analysis/AliasAnalysis.h"
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21 #include "llvm/CodeGen/LiveVariables.h"
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22 #include "llvm/CodeGen/MachineBlockFrequencyInfo.h"
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23 #include "llvm/CodeGen/MachineDominators.h"
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24 #include "llvm/CodeGen/MachineInstr.h"
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25 #include "llvm/CodeGen/MachineRegisterInfo.h"
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26 #include "llvm/CodeGen/Passes.h"
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27 #include "llvm/CodeGen/VirtRegMap.h"
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28 #include "llvm/IR/Value.h"
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29 #include "llvm/Support/BlockFrequency.h"
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30 #include "llvm/Support/CommandLine.h"
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31 #include "llvm/Support/Debug.h"
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32 #include "llvm/Support/ErrorHandling.h"
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33 #include "llvm/Support/raw_ostream.h"
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34 #include "llvm/Target/TargetInstrInfo.h"
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35 #include "llvm/Target/TargetRegisterInfo.h"
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36 #include "llvm/Target/TargetSubtargetInfo.h"
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37 #include <algorithm>
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38 #include <cmath>
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39 using namespace llvm;
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40
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41 #define DEBUG_TYPE "regalloc"
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42
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43 char LiveIntervals::ID = 0;
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44 char &llvm::LiveIntervalsID = LiveIntervals::ID;
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45 INITIALIZE_PASS_BEGIN(LiveIntervals, "liveintervals",
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46 "Live Interval Analysis", false, false)
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47 INITIALIZE_PASS_DEPENDENCY(AAResultsWrapperPass)
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48 INITIALIZE_PASS_DEPENDENCY(MachineDominatorTree)
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49 INITIALIZE_PASS_DEPENDENCY(SlotIndexes)
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50 INITIALIZE_PASS_END(LiveIntervals, "liveintervals",
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51 "Live Interval Analysis", false, false)
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52
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53 #ifndef NDEBUG
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54 static cl::opt<bool> EnablePrecomputePhysRegs(
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55 "precompute-phys-liveness", cl::Hidden,
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56 cl::desc("Eagerly compute live intervals for all physreg units."));
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57 #else
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58 static bool EnablePrecomputePhysRegs = false;
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59 #endif // NDEBUG
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60
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61 namespace llvm {
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62 cl::opt<bool> UseSegmentSetForPhysRegs(
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63 "use-segment-set-for-physregs", cl::Hidden, cl::init(true),
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64 cl::desc(
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65 "Use segment set for the computation of the live ranges of physregs."));
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66 }
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67
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68 void LiveIntervals::getAnalysisUsage(AnalysisUsage &AU) const {
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69 AU.setPreservesCFG();
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70 AU.addRequired<AAResultsWrapperPass>();
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71 AU.addPreserved<AAResultsWrapperPass>();
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72 AU.addPreserved<LiveVariables>();
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73 AU.addPreservedID(MachineLoopInfoID);
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74 AU.addRequiredTransitiveID(MachineDominatorsID);
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75 AU.addPreservedID(MachineDominatorsID);
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76 AU.addPreserved<SlotIndexes>();
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77 AU.addRequiredTransitive<SlotIndexes>();
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78 MachineFunctionPass::getAnalysisUsage(AU);
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79 }
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80
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81 LiveIntervals::LiveIntervals() : MachineFunctionPass(ID),
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82 DomTree(nullptr), LRCalc(nullptr) {
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83 initializeLiveIntervalsPass(*PassRegistry::getPassRegistry());
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84 }
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85
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86 LiveIntervals::~LiveIntervals() {
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87 delete LRCalc;
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88 }
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89
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90 void LiveIntervals::releaseMemory() {
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91 // Free the live intervals themselves.
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92 for (unsigned i = 0, e = VirtRegIntervals.size(); i != e; ++i)
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93 delete VirtRegIntervals[TargetRegisterInfo::index2VirtReg(i)];
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94 VirtRegIntervals.clear();
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95 RegMaskSlots.clear();
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96 RegMaskBits.clear();
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97 RegMaskBlocks.clear();
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98
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99 for (unsigned i = 0, e = RegUnitRanges.size(); i != e; ++i)
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100 delete RegUnitRanges[i];
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101 RegUnitRanges.clear();
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102
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103 // Release VNInfo memory regions, VNInfo objects don't need to be dtor'd.
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104 VNInfoAllocator.Reset();
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105 }
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106
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107 /// runOnMachineFunction - calculates LiveIntervals
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108 ///
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109 bool LiveIntervals::runOnMachineFunction(MachineFunction &fn) {
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110 MF = &fn;
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111 MRI = &MF->getRegInfo();
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112 TRI = MF->getSubtarget().getRegisterInfo();
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113 TII = MF->getSubtarget().getInstrInfo();
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114 AA = &getAnalysis<AAResultsWrapperPass>().getAAResults();
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115 Indexes = &getAnalysis<SlotIndexes>();
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116 DomTree = &getAnalysis<MachineDominatorTree>();
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117
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118 if (!LRCalc)
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119 LRCalc = new LiveRangeCalc();
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120
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121 // Allocate space for all virtual registers.
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122 VirtRegIntervals.resize(MRI->getNumVirtRegs());
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123
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124 computeVirtRegs();
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125 computeRegMasks();
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126 computeLiveInRegUnits();
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127
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128 if (EnablePrecomputePhysRegs) {
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129 // For stress testing, precompute live ranges of all physical register
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
130 // units, including reserved registers.
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
131 for (unsigned i = 0, e = TRI->getNumRegUnits(); i != e; ++i)
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
132 getRegUnit(i);
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
133 }
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
134 DEBUG(dump());
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
135 return true;
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
136 }
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
137
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
138 /// print - Implement the dump method.
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
139 void LiveIntervals::print(raw_ostream &OS, const Module* ) const {
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
140 OS << "********** INTERVALS **********\n";
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
141
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
142 // Dump the regunits.
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
143 for (unsigned i = 0, e = RegUnitRanges.size(); i != e; ++i)
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
144 if (LiveRange *LR = RegUnitRanges[i])
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
145 OS << PrintRegUnit(i, TRI) << ' ' << *LR << '\n';
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
146
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
147 // Dump the virtregs.
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
148 for (unsigned i = 0, e = MRI->getNumVirtRegs(); i != e; ++i) {
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
149 unsigned Reg = TargetRegisterInfo::index2VirtReg(i);
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
150 if (hasInterval(Reg))
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
151 OS << getInterval(Reg) << '\n';
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
152 }
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
153
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
154 OS << "RegMasks:";
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
155 for (unsigned i = 0, e = RegMaskSlots.size(); i != e; ++i)
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
156 OS << ' ' << RegMaskSlots[i];
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
157 OS << '\n';
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
158
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
159 printInstrs(OS);
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
160 }
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
161
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
162 void LiveIntervals::printInstrs(raw_ostream &OS) const {
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
163 OS << "********** MACHINEINSTRS **********\n";
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
164 MF->print(OS, Indexes);
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
165 }
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
166
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
167 #if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
168 void LiveIntervals::dumpInstrs() const {
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
169 printInstrs(dbgs());
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
170 }
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
171 #endif
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
172
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
173 LiveInterval* LiveIntervals::createInterval(unsigned reg) {
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
174 float Weight = TargetRegisterInfo::isPhysicalRegister(reg) ?
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
175 llvm::huge_valf : 0.0F;
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
176 return new LiveInterval(reg, Weight);
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
177 }
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
178
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
179
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
180 /// computeVirtRegInterval - Compute the live interval of a virtual register,
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
181 /// based on defs and uses.
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
182 void LiveIntervals::computeVirtRegInterval(LiveInterval &LI) {
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
183 assert(LRCalc && "LRCalc not initialized.");
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
184 assert(LI.empty() && "Should only compute empty intervals.");
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
185 LRCalc->reset(MF, getSlotIndexes(), DomTree, &getVNInfoAllocator());
120
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
186 LRCalc->calculate(LI, MRI->shouldTrackSubRegLiveness(LI.reg));
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
187 computeDeadValues(LI, nullptr);
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
188 }
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
189
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
190 void LiveIntervals::computeVirtRegs() {
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
191 for (unsigned i = 0, e = MRI->getNumVirtRegs(); i != e; ++i) {
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
192 unsigned Reg = TargetRegisterInfo::index2VirtReg(i);
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
193 if (MRI->reg_nodbg_empty(Reg))
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
194 continue;
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
195 createAndComputeVirtRegInterval(Reg);
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
196 }
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
197 }
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
198
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
199 void LiveIntervals::computeRegMasks() {
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
200 RegMaskBlocks.resize(MF->getNumBlockIDs());
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
201
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
202 // Find all instructions with regmask operands.
100
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
203 for (MachineBasicBlock &MBB : *MF) {
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
204 std::pair<unsigned, unsigned> &RMB = RegMaskBlocks[MBB.getNumber()];
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
205 RMB.first = RegMaskSlots.size();
100
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
206
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
207 // Some block starts, such as EH funclets, create masks.
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
208 if (const uint32_t *Mask = MBB.getBeginClobberMask(TRI)) {
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
209 RegMaskSlots.push_back(Indexes->getMBBStartIdx(&MBB));
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
210 RegMaskBits.push_back(Mask);
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
211 }
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
212
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
213 for (MachineInstr &MI : MBB) {
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
214 for (const MachineOperand &MO : MI.operands()) {
95
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 83
diff changeset
215 if (!MO.isRegMask())
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
216 continue;
120
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
217 RegMaskSlots.push_back(Indexes->getInstructionIndex(MI).getRegSlot());
100
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
218 RegMaskBits.push_back(MO.getRegMask());
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
219 }
100
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
220 }
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
221
120
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
222 // Some block ends, such as funclet returns, create masks. Put the mask on
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
223 // the last instruction of the block, because MBB slot index intervals are
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
224 // half-open.
100
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
225 if (const uint32_t *Mask = MBB.getEndClobberMask(TRI)) {
120
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
226 assert(!MBB.empty() && "empty return block?");
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
227 RegMaskSlots.push_back(
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
228 Indexes->getInstructionIndex(MBB.back()).getRegSlot());
100
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
229 RegMaskBits.push_back(Mask);
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
230 }
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
231
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
232 // Compute the number of register mask instructions in this block.
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
233 RMB.second = RegMaskSlots.size() - RMB.first;
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
234 }
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
235 }
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
236
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
237 //===----------------------------------------------------------------------===//
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
238 // Register Unit Liveness
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
239 //===----------------------------------------------------------------------===//
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
240 //
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
241 // Fixed interference typically comes from ABI boundaries: Function arguments
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
242 // and return values are passed in fixed registers, and so are exception
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
243 // pointers entering landing pads. Certain instructions require values to be
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
244 // present in specific registers. That is also represented through fixed
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
245 // interference.
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
246 //
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
247
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
248 /// computeRegUnitInterval - Compute the live range of a register unit, based
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
249 /// on the uses and defs of aliasing registers. The range should be empty,
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
250 /// or contain only dead phi-defs from ABI blocks.
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
251 void LiveIntervals::computeRegUnitRange(LiveRange &LR, unsigned Unit) {
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
252 assert(LRCalc && "LRCalc not initialized.");
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
253 LRCalc->reset(MF, getSlotIndexes(), DomTree, &getVNInfoAllocator());
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
254
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
255 // The physregs aliasing Unit are the roots and their super-registers.
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
256 // Create all values as dead defs before extending to uses. Note that roots
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
257 // may share super-registers. That's OK because createDeadDefs() is
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
258 // idempotent. It is very rare for a register unit to have multiple roots, so
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
259 // uniquing super-registers is probably not worthwhile.
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
260 for (MCRegUnitRootIterator Roots(Unit, TRI); Roots.isValid(); ++Roots) {
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
261 for (MCSuperRegIterator Supers(*Roots, TRI, /*IncludeSelf=*/true);
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
262 Supers.isValid(); ++Supers) {
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
263 if (!MRI->reg_empty(*Supers))
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
264 LRCalc->createDeadDefs(LR, *Supers);
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
265 }
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
266 }
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
267
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
268 // Now extend LR to reach all uses.
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
269 // Ignore uses of reserved registers. We only track defs of those.
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
270 for (MCRegUnitRootIterator Roots(Unit, TRI); Roots.isValid(); ++Roots) {
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
271 for (MCSuperRegIterator Supers(*Roots, TRI, /*IncludeSelf=*/true);
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
272 Supers.isValid(); ++Supers) {
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
273 unsigned Reg = *Supers;
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
274 if (!MRI->isReserved(Reg) && !MRI->reg_empty(Reg))
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
275 LRCalc->extendToUses(LR, Reg);
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
276 }
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
277 }
83
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
278
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
279 // Flush the segment set to the segment vector.
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
280 if (UseSegmentSetForPhysRegs)
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
281 LR.flushSegmentSet();
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
282 }
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
283
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
284
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
285 /// computeLiveInRegUnits - Precompute the live ranges of any register units
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
286 /// that are live-in to an ABI block somewhere. Register values can appear
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
287 /// without a corresponding def when entering the entry block or a landing pad.
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
288 ///
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
289 void LiveIntervals::computeLiveInRegUnits() {
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
290 RegUnitRanges.resize(TRI->getNumRegUnits());
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
291 DEBUG(dbgs() << "Computing live-in reg-units in ABI blocks.\n");
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
292
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
293 // Keep track of the live range sets allocated.
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
294 SmallVector<unsigned, 8> NewRanges;
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
295
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
296 // Check all basic blocks for live-ins.
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
297 for (MachineFunction::const_iterator MFI = MF->begin(), MFE = MF->end();
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
298 MFI != MFE; ++MFI) {
95
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 83
diff changeset
299 const MachineBasicBlock *MBB = &*MFI;
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
300
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
301 // We only care about ABI blocks: Entry + landing pads.
95
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 83
diff changeset
302 if ((MFI != MF->begin() && !MBB->isEHPad()) || MBB->livein_empty())
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
303 continue;
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
304
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
305 // Create phi-defs at Begin for all live-in registers.
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
306 SlotIndex Begin = Indexes->getMBBStartIdx(MBB);
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
307 DEBUG(dbgs() << Begin << "\tBB#" << MBB->getNumber());
95
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 83
diff changeset
308 for (const auto &LI : MBB->liveins()) {
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 83
diff changeset
309 for (MCRegUnitIterator Units(LI.PhysReg, TRI); Units.isValid(); ++Units) {
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
310 unsigned Unit = *Units;
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
311 LiveRange *LR = RegUnitRanges[Unit];
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
312 if (!LR) {
83
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
313 // Use segment set to speed-up initial computation of the live range.
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
314 LR = RegUnitRanges[Unit] = new LiveRange(UseSegmentSetForPhysRegs);
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
315 NewRanges.push_back(Unit);
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
316 }
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
317 VNInfo *VNI = LR->createDeadDef(Begin, getVNInfoAllocator());
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
318 (void)VNI;
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
319 DEBUG(dbgs() << ' ' << PrintRegUnit(Unit, TRI) << '#' << VNI->id);
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
320 }
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
321 }
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
322 DEBUG(dbgs() << '\n');
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
323 }
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
324 DEBUG(dbgs() << "Created " << NewRanges.size() << " new intervals.\n");
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
325
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
326 // Compute the 'normal' part of the ranges.
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
327 for (unsigned i = 0, e = NewRanges.size(); i != e; ++i) {
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
328 unsigned Unit = NewRanges[i];
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
329 computeRegUnitRange(*RegUnitRanges[Unit], Unit);
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
330 }
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
331 }
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
332
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
333
83
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
334 static void createSegmentsForValues(LiveRange &LR,
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
335 iterator_range<LiveInterval::vni_iterator> VNIs) {
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
336 for (auto VNI : VNIs) {
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
337 if (VNI->isUnused())
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
338 continue;
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
339 SlotIndex Def = VNI->def;
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
340 LR.addSegment(LiveRange::Segment(Def, Def.getDeadSlot(), VNI));
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
341 }
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
342 }
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
343
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
344 typedef SmallVector<std::pair<SlotIndex, VNInfo*>, 16> ShrinkToUsesWorkList;
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
345
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
346 static void extendSegmentsToUses(LiveRange &LR, const SlotIndexes &Indexes,
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
347 ShrinkToUsesWorkList &WorkList,
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
348 const LiveRange &OldRange) {
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
349 // Keep track of the PHIs that are in use.
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
350 SmallPtrSet<VNInfo*, 8> UsedPHIs;
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
351 // Blocks that have already been added to WorkList as live-out.
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
352 SmallPtrSet<MachineBasicBlock*, 16> LiveOut;
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
353
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
354 // Extend intervals to reach all uses in WorkList.
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
355 while (!WorkList.empty()) {
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
356 SlotIndex Idx = WorkList.back().first;
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
357 VNInfo *VNI = WorkList.back().second;
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
358 WorkList.pop_back();
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
359 const MachineBasicBlock *MBB = Indexes.getMBBFromIndex(Idx.getPrevSlot());
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
360 SlotIndex BlockStart = Indexes.getMBBStartIdx(MBB);
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
361
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
362 // Extend the live range for VNI to be live at Idx.
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
363 if (VNInfo *ExtVNI = LR.extendInBlock(BlockStart, Idx)) {
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
364 assert(ExtVNI == VNI && "Unexpected existing value number");
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
365 (void)ExtVNI;
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
366 // Is this a PHIDef we haven't seen before?
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
367 if (!VNI->isPHIDef() || VNI->def != BlockStart ||
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
368 !UsedPHIs.insert(VNI).second)
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
369 continue;
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
370 // The PHI is live, make sure the predecessors are live-out.
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
371 for (auto &Pred : MBB->predecessors()) {
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
372 if (!LiveOut.insert(Pred).second)
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
373 continue;
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
374 SlotIndex Stop = Indexes.getMBBEndIdx(Pred);
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
375 // A predecessor is not required to have a live-out value for a PHI.
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
376 if (VNInfo *PVNI = OldRange.getVNInfoBefore(Stop))
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
377 WorkList.push_back(std::make_pair(Stop, PVNI));
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
378 }
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
379 continue;
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
380 }
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
381
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
382 // VNI is live-in to MBB.
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
383 DEBUG(dbgs() << " live-in at " << BlockStart << '\n');
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
384 LR.addSegment(LiveRange::Segment(BlockStart, Idx, VNI));
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
385
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
386 // Make sure VNI is live-out from the predecessors.
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
387 for (auto &Pred : MBB->predecessors()) {
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
388 if (!LiveOut.insert(Pred).second)
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
389 continue;
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
390 SlotIndex Stop = Indexes.getMBBEndIdx(Pred);
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
391 assert(OldRange.getVNInfoBefore(Stop) == VNI &&
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
392 "Wrong value out of predecessor");
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
393 WorkList.push_back(std::make_pair(Stop, VNI));
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
394 }
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
395 }
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
396 }
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
397
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
398 bool LiveIntervals::shrinkToUses(LiveInterval *li,
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
399 SmallVectorImpl<MachineInstr*> *dead) {
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
400 DEBUG(dbgs() << "Shrink: " << *li << '\n');
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
401 assert(TargetRegisterInfo::isVirtualRegister(li->reg)
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
402 && "Can only shrink virtual registers");
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
403
83
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
404 // Shrink subregister live ranges.
95
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 83
diff changeset
405 bool NeedsCleanup = false;
83
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
406 for (LiveInterval::SubRange &S : li->subranges()) {
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
407 shrinkToUses(S, li->reg);
95
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 83
diff changeset
408 if (S.empty())
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 83
diff changeset
409 NeedsCleanup = true;
83
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
410 }
95
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 83
diff changeset
411 if (NeedsCleanup)
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 83
diff changeset
412 li->removeEmptySubRanges();
83
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
413
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
414 // Find all the values used, including PHI kills.
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
415 ShrinkToUsesWorkList WorkList;
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
416
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
417 // Visit all instructions reading li->reg.
77
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
418 for (MachineRegisterInfo::reg_instr_iterator
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
419 I = MRI->reg_instr_begin(li->reg), E = MRI->reg_instr_end();
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
420 I != E; ) {
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
421 MachineInstr *UseMI = &*(I++);
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
422 if (UseMI->isDebugValue() || !UseMI->readsVirtualRegister(li->reg))
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
423 continue;
120
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
424 SlotIndex Idx = getInstructionIndex(*UseMI).getRegSlot();
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
425 LiveQueryResult LRQ = li->Query(Idx);
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
426 VNInfo *VNI = LRQ.valueIn();
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
427 if (!VNI) {
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
428 // This shouldn't happen: readsVirtualRegister returns true, but there is
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
429 // no live value. It is likely caused by a target getting <undef> flags
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
430 // wrong.
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
431 DEBUG(dbgs() << Idx << '\t' << *UseMI
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
432 << "Warning: Instr claims to read non-existent value in "
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
433 << *li << '\n');
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
434 continue;
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
435 }
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
436 // Special case: An early-clobber tied operand reads and writes the
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
437 // register one slot early.
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
438 if (VNInfo *DefVNI = LRQ.valueDefined())
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
439 Idx = DefVNI->def;
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
440
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
441 WorkList.push_back(std::make_pair(Idx, VNI));
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
442 }
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
443
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
444 // Create new live ranges with only minimal live segments per def.
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
445 LiveRange NewLR;
83
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
446 createSegmentsForValues(NewLR, make_range(li->vni_begin(), li->vni_end()));
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
447 extendSegmentsToUses(NewLR, *Indexes, WorkList, *li);
77
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
448
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
449 // Move the trimmed segments back.
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
450 li->segments.swap(NewLR.segments);
83
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
451
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
452 // Handle dead values.
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
453 bool CanSeparate = computeDeadValues(*li, dead);
77
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
454 DEBUG(dbgs() << "Shrunk: " << *li << '\n');
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
455 return CanSeparate;
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
456 }
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
457
83
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
458 bool LiveIntervals::computeDeadValues(LiveInterval &LI,
77
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
459 SmallVectorImpl<MachineInstr*> *dead) {
95
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 83
diff changeset
460 bool MayHaveSplitComponents = false;
83
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
461 for (auto VNI : LI.valnos) {
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
462 if (VNI->isUnused())
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
463 continue;
83
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
464 SlotIndex Def = VNI->def;
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
465 LiveRange::iterator I = LI.FindSegmentContaining(Def);
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
466 assert(I != LI.end() && "Missing segment for VNI");
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
467
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
468 // Is the register live before? Otherwise we may have to add a read-undef
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
469 // flag for subregister defs.
95
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 83
diff changeset
470 unsigned VReg = LI.reg;
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 83
diff changeset
471 if (MRI->shouldTrackSubRegLiveness(VReg)) {
83
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
472 if ((I == LI.begin() || std::prev(I)->end < Def) && !VNI->isPHIDef()) {
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
473 MachineInstr *MI = getInstructionFromIndex(Def);
100
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
474 MI->setRegisterDefReadUndef(VReg);
83
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
475 }
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
476 }
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
477
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
478 if (I->end != Def.getDeadSlot())
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
479 continue;
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
480 if (VNI->isPHIDef()) {
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
481 // This is a dead PHI. Remove it.
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
482 VNI->markUnused();
83
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
483 LI.removeSegment(I);
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
484 DEBUG(dbgs() << "Dead PHI at " << Def << " may separate interval\n");
95
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 83
diff changeset
485 MayHaveSplitComponents = true;
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
486 } else {
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
487 // This is a dead def. Make sure the instruction knows.
83
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
488 MachineInstr *MI = getInstructionFromIndex(Def);
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
489 assert(MI && "No instruction defining live value");
120
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
490 MI->addRegisterDead(LI.reg, TRI);
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
491 if (dead && MI->allDefsAreDead()) {
83
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
492 DEBUG(dbgs() << "All defs dead: " << Def << '\t' << *MI);
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
493 dead->push_back(MI);
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
494 }
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
495 }
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
496 }
95
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 83
diff changeset
497 return MayHaveSplitComponents;
83
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
498 }
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
499
120
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
500 void LiveIntervals::shrinkToUses(LiveInterval::SubRange &SR, unsigned Reg) {
83
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
501 DEBUG(dbgs() << "Shrink: " << SR << '\n');
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
502 assert(TargetRegisterInfo::isVirtualRegister(Reg)
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
503 && "Can only shrink virtual registers");
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
504 // Find all the values used, including PHI kills.
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
505 ShrinkToUsesWorkList WorkList;
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
506
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
507 // Visit all instructions reading Reg.
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
508 SlotIndex LastIdx;
120
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
509 for (MachineOperand &MO : MRI->use_nodbg_operands(Reg)) {
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
510 // Skip "undef" uses.
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
511 if (!MO.readsReg())
83
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
512 continue;
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
513 // Maybe the operand is for a subregister we don't care about.
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
514 unsigned SubReg = MO.getSubReg();
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
515 if (SubReg != 0) {
95
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 83
diff changeset
516 LaneBitmask LaneMask = TRI->getSubRegIndexLaneMask(SubReg);
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 83
diff changeset
517 if ((LaneMask & SR.LaneMask) == 0)
83
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
518 continue;
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
519 }
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
520 // We only need to visit each instruction once.
120
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
521 MachineInstr *UseMI = MO.getParent();
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
522 SlotIndex Idx = getInstructionIndex(*UseMI).getRegSlot();
83
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
523 if (Idx == LastIdx)
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
524 continue;
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
525 LastIdx = Idx;
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
526
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
527 LiveQueryResult LRQ = SR.Query(Idx);
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
528 VNInfo *VNI = LRQ.valueIn();
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
529 // For Subranges it is possible that only undef values are left in that
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
530 // part of the subregister, so there is no real liverange at the use
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
531 if (!VNI)
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
532 continue;
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
533
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
534 // Special case: An early-clobber tied operand reads and writes the
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
535 // register one slot early.
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
536 if (VNInfo *DefVNI = LRQ.valueDefined())
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
537 Idx = DefVNI->def;
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
538
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
539 WorkList.push_back(std::make_pair(Idx, VNI));
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
540 }
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
541
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
542 // Create a new live ranges with only minimal live segments per def.
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
543 LiveRange NewLR;
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
544 createSegmentsForValues(NewLR, make_range(SR.vni_begin(), SR.vni_end()));
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
545 extendSegmentsToUses(NewLR, *Indexes, WorkList, SR);
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
546
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
547 // Move the trimmed ranges back.
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
548 SR.segments.swap(NewLR.segments);
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
549
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
550 // Remove dead PHI value numbers
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
551 for (auto VNI : SR.valnos) {
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
552 if (VNI->isUnused())
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
553 continue;
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
554 const LiveRange::Segment *Segment = SR.getSegmentContaining(VNI->def);
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
555 assert(Segment != nullptr && "Missing segment for VNI");
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
556 if (Segment->end != VNI->def.getDeadSlot())
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
557 continue;
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
558 if (VNI->isPHIDef()) {
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
559 // This is a dead PHI. Remove it.
120
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
560 DEBUG(dbgs() << "Dead PHI at " << VNI->def << " may separate interval\n");
83
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
561 VNI->markUnused();
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
562 SR.removeSegment(*Segment);
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
563 }
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
564 }
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
565
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
566 DEBUG(dbgs() << "Shrunk: " << SR << '\n');
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
567 }
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
568
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
569 void LiveIntervals::extendToIndices(LiveRange &LR,
120
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
570 ArrayRef<SlotIndex> Indices,
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
571 ArrayRef<SlotIndex> Undefs) {
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
572 assert(LRCalc && "LRCalc not initialized.");
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
573 LRCalc->reset(MF, getSlotIndexes(), DomTree, &getVNInfoAllocator());
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
574 for (unsigned i = 0, e = Indices.size(); i != e; ++i)
120
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
575 LRCalc->extend(LR, Indices[i], /*PhysReg=*/0, Undefs);
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
576 }
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
577
83
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
578 void LiveIntervals::pruneValue(LiveRange &LR, SlotIndex Kill,
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
579 SmallVectorImpl<SlotIndex> *EndPoints) {
83
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
580 LiveQueryResult LRQ = LR.Query(Kill);
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
581 VNInfo *VNI = LRQ.valueOutOrDead();
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
582 if (!VNI)
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
583 return;
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
584
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
585 MachineBasicBlock *KillMBB = Indexes->getMBBFromIndex(Kill);
83
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
586 SlotIndex MBBEnd = Indexes->getMBBEndIdx(KillMBB);
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
587
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
588 // If VNI isn't live out from KillMBB, the value is trivially pruned.
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
589 if (LRQ.endPoint() < MBBEnd) {
83
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
590 LR.removeSegment(Kill, LRQ.endPoint());
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
591 if (EndPoints) EndPoints->push_back(LRQ.endPoint());
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
592 return;
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
593 }
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
594
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
595 // VNI is live out of KillMBB.
83
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
596 LR.removeSegment(Kill, MBBEnd);
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
597 if (EndPoints) EndPoints->push_back(MBBEnd);
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
598
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
599 // Find all blocks that are reachable from KillMBB without leaving VNI's live
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
600 // range. It is possible that KillMBB itself is reachable, so start a DFS
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
601 // from each successor.
120
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
602 typedef df_iterator_default_set<MachineBasicBlock*,9> VisitedTy;
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
603 VisitedTy Visited;
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
604 for (MachineBasicBlock::succ_iterator
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
605 SuccI = KillMBB->succ_begin(), SuccE = KillMBB->succ_end();
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
606 SuccI != SuccE; ++SuccI) {
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
607 for (df_ext_iterator<MachineBasicBlock*, VisitedTy>
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
608 I = df_ext_begin(*SuccI, Visited), E = df_ext_end(*SuccI, Visited);
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
609 I != E;) {
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
610 MachineBasicBlock *MBB = *I;
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
611
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
612 // Check if VNI is live in to MBB.
83
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
613 SlotIndex MBBStart, MBBEnd;
77
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
614 std::tie(MBBStart, MBBEnd) = Indexes->getMBBRange(MBB);
83
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
615 LiveQueryResult LRQ = LR.Query(MBBStart);
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
616 if (LRQ.valueIn() != VNI) {
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
617 // This block isn't part of the VNI segment. Prune the search.
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
618 I.skipChildren();
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
619 continue;
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
620 }
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
621
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
622 // Prune the search if VNI is killed in MBB.
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
623 if (LRQ.endPoint() < MBBEnd) {
83
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
624 LR.removeSegment(MBBStart, LRQ.endPoint());
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
625 if (EndPoints) EndPoints->push_back(LRQ.endPoint());
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
626 I.skipChildren();
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
627 continue;
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
628 }
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
629
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
630 // VNI is live through MBB.
83
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
631 LR.removeSegment(MBBStart, MBBEnd);
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
632 if (EndPoints) EndPoints->push_back(MBBEnd);
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
633 ++I;
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
634 }
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
635 }
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
636 }
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
637
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
638 //===----------------------------------------------------------------------===//
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
639 // Register allocator hooks.
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
640 //
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
641
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
642 void LiveIntervals::addKillFlags(const VirtRegMap *VRM) {
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
643 // Keep track of regunit ranges.
83
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
644 SmallVector<std::pair<const LiveRange*, LiveRange::const_iterator>, 8> RU;
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
645 // Keep track of subregister ranges.
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
646 SmallVector<std::pair<const LiveInterval::SubRange*,
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
647 LiveRange::const_iterator>, 4> SRs;
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
648
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
649 for (unsigned i = 0, e = MRI->getNumVirtRegs(); i != e; ++i) {
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
650 unsigned Reg = TargetRegisterInfo::index2VirtReg(i);
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
651 if (MRI->reg_nodbg_empty(Reg))
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
652 continue;
83
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
653 const LiveInterval &LI = getInterval(Reg);
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
654 if (LI.empty())
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
655 continue;
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
656
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
657 // Find the regunit intervals for the assigned register. They may overlap
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
658 // the virtual register live range, cancelling any kills.
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
659 RU.clear();
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
660 for (MCRegUnitIterator Units(VRM->getPhys(Reg), TRI); Units.isValid();
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
661 ++Units) {
83
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
662 const LiveRange &RURange = getRegUnit(*Units);
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
663 if (RURange.empty())
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
664 continue;
83
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
665 RU.push_back(std::make_pair(&RURange, RURange.find(LI.begin()->end)));
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
666 }
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
667
95
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 83
diff changeset
668 if (MRI->subRegLivenessEnabled()) {
83
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
669 SRs.clear();
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
670 for (const LiveInterval::SubRange &SR : LI.subranges()) {
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
671 SRs.push_back(std::make_pair(&SR, SR.find(LI.begin()->end)));
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
672 }
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
673 }
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
674
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
675 // Every instruction that kills Reg corresponds to a segment range end
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
676 // point.
83
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
677 for (LiveInterval::const_iterator RI = LI.begin(), RE = LI.end(); RI != RE;
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
678 ++RI) {
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
679 // A block index indicates an MBB edge.
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
680 if (RI->end.isBlock())
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
681 continue;
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
682 MachineInstr *MI = getInstructionFromIndex(RI->end);
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
683 if (!MI)
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
684 continue;
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
685
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
686 // Check if any of the regunits are live beyond the end of RI. That could
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
687 // happen when a physreg is defined as a copy of a virtreg:
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
688 //
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
689 // %EAX = COPY %vreg5
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
690 // FOO %vreg5 <--- MI, cancel kill because %EAX is live.
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
691 // BAR %EAX<kill>
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
692 //
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
693 // There should be no kill flag on FOO when %vreg5 is rewritten as %EAX.
83
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
694 for (auto &RUP : RU) {
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
695 const LiveRange &RURange = *RUP.first;
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
696 LiveRange::const_iterator &I = RUP.second;
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
697 if (I == RURange.end())
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
698 continue;
83
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
699 I = RURange.advanceTo(I, RI->end);
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
700 if (I == RURange.end() || I->start >= RI->end)
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
701 continue;
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
702 // I is overlapping RI.
83
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
703 goto CancelKill;
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
704 }
83
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
705
95
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 83
diff changeset
706 if (MRI->subRegLivenessEnabled()) {
83
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
707 // When reading a partial undefined value we must not add a kill flag.
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
708 // The regalloc might have used the undef lane for something else.
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
709 // Example:
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
710 // %vreg1 = ... ; R32: %vreg1
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
711 // %vreg2:high16 = ... ; R64: %vreg2
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
712 // = read %vreg2<kill> ; R64: %vreg2
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
713 // = read %vreg1 ; R32: %vreg1
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
714 // The <kill> flag is correct for %vreg2, but the register allocator may
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
715 // assign R0L to %vreg1, and R0 to %vreg2 because the low 32bits of R0
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
716 // are actually never written by %vreg2. After assignment the <kill>
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
717 // flag at the read instruction is invalid.
95
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 83
diff changeset
718 LaneBitmask DefinedLanesMask;
83
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
719 if (!SRs.empty()) {
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
720 // Compute a mask of lanes that are defined.
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
721 DefinedLanesMask = 0;
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
722 for (auto &SRP : SRs) {
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
723 const LiveInterval::SubRange &SR = *SRP.first;
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
724 LiveRange::const_iterator &I = SRP.second;
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
725 if (I == SR.end())
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
726 continue;
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
727 I = SR.advanceTo(I, RI->end);
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
728 if (I == SR.end() || I->start >= RI->end)
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
729 continue;
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
730 // I is overlapping RI
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
731 DefinedLanesMask |= SR.LaneMask;
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
732 }
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
733 } else
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
734 DefinedLanesMask = ~0u;
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
735
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
736 bool IsFullWrite = false;
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
737 for (const MachineOperand &MO : MI->operands()) {
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
738 if (!MO.isReg() || MO.getReg() != Reg)
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
739 continue;
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
740 if (MO.isUse()) {
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
741 // Reading any undefined lanes?
95
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 83
diff changeset
742 LaneBitmask UseMask = TRI->getSubRegIndexLaneMask(MO.getSubReg());
83
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
743 if ((UseMask & ~DefinedLanesMask) != 0)
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
744 goto CancelKill;
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
745 } else if (MO.getSubReg() == 0) {
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
746 // Writing to the full register?
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
747 assert(MO.isDef());
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
748 IsFullWrite = true;
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
749 }
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
750 }
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
751
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
752 // If an instruction writes to a subregister, a new segment starts in
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
753 // the LiveInterval. But as this is only overriding part of the register
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
754 // adding kill-flags is not correct here after registers have been
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
755 // assigned.
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
756 if (!IsFullWrite) {
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
757 // Next segment has to be adjacent in the subregister write case.
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
758 LiveRange::const_iterator N = std::next(RI);
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
759 if (N != LI.end() && N->start == RI->end)
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
760 goto CancelKill;
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
761 }
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
762 }
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
763
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
764 MI->addRegisterKilled(Reg, nullptr);
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
765 continue;
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
766 CancelKill:
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
767 MI->clearRegisterKills(Reg, nullptr);
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
768 }
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
769 }
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
770 }
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
771
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
772 MachineBasicBlock*
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
773 LiveIntervals::intervalIsInOneMBB(const LiveInterval &LI) const {
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
774 // A local live range must be fully contained inside the block, meaning it is
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
775 // defined and killed at instructions, not at block boundaries. It is not
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
776 // live in or or out of any block.
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
777 //
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
778 // It is technically possible to have a PHI-defined live range identical to a
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
779 // single block, but we are going to return false in that case.
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
780
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
781 SlotIndex Start = LI.beginIndex();
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
782 if (Start.isBlock())
77
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
783 return nullptr;
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
784
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
785 SlotIndex Stop = LI.endIndex();
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
786 if (Stop.isBlock())
77
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
787 return nullptr;
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
788
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
789 // getMBBFromIndex doesn't need to search the MBB table when both indexes
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
790 // belong to proper instructions.
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
791 MachineBasicBlock *MBB1 = Indexes->getMBBFromIndex(Start);
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
792 MachineBasicBlock *MBB2 = Indexes->getMBBFromIndex(Stop);
77
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
793 return MBB1 == MBB2 ? MBB1 : nullptr;
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
794 }
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
795
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
796 bool
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
797 LiveIntervals::hasPHIKill(const LiveInterval &LI, const VNInfo *VNI) const {
83
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
798 for (const VNInfo *PHI : LI.valnos) {
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
799 if (PHI->isUnused() || !PHI->isPHIDef())
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
800 continue;
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
801 const MachineBasicBlock *PHIMBB = getMBBFromIndex(PHI->def);
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
802 // Conservatively return true instead of scanning huge predecessor lists.
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
803 if (PHIMBB->pred_size() > 100)
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
804 return true;
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
805 for (MachineBasicBlock::const_pred_iterator
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
806 PI = PHIMBB->pred_begin(), PE = PHIMBB->pred_end(); PI != PE; ++PI)
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
807 if (VNI == LI.getVNInfoBefore(Indexes->getMBBEndIdx(*PI)))
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
808 return true;
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
809 }
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
810 return false;
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
811 }
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
812
120
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
813 float LiveIntervals::getSpillWeight(bool isDef, bool isUse,
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
814 const MachineBlockFrequencyInfo *MBFI,
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
815 const MachineInstr &MI) {
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
816 BlockFrequency Freq = MBFI->getBlockFreq(MI.getParent());
77
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
817 const float Scale = 1.0f / MBFI->getEntryFreq();
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
818 return (isDef + isUse) * (Freq.getFrequency() * Scale);
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
819 }
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
820
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
821 LiveRange::Segment
120
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
822 LiveIntervals::addSegmentToEndOfBlock(unsigned reg, MachineInstr &startInst) {
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
823 LiveInterval& Interval = createEmptyInterval(reg);
120
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
824 VNInfo *VN = Interval.getNextValue(
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
825 SlotIndex(getInstructionIndex(startInst).getRegSlot()),
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
826 getVNInfoAllocator());
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
827 LiveRange::Segment S(SlotIndex(getInstructionIndex(startInst).getRegSlot()),
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
828 getMBBEndIdx(startInst.getParent()), VN);
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
829 Interval.addSegment(S);
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
830
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
831 return S;
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
832 }
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
833
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
834
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
835 //===----------------------------------------------------------------------===//
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
836 // Register mask functions
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
837 //===----------------------------------------------------------------------===//
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
838
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
839 bool LiveIntervals::checkRegMaskInterference(LiveInterval &LI,
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
840 BitVector &UsableRegs) {
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
841 if (LI.empty())
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
842 return false;
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
843 LiveInterval::iterator LiveI = LI.begin(), LiveE = LI.end();
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
844
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
845 // Use a smaller arrays for local live ranges.
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
846 ArrayRef<SlotIndex> Slots;
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
847 ArrayRef<const uint32_t*> Bits;
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
848 if (MachineBasicBlock *MBB = intervalIsInOneMBB(LI)) {
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
849 Slots = getRegMaskSlotsInBlock(MBB->getNumber());
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
850 Bits = getRegMaskBitsInBlock(MBB->getNumber());
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
851 } else {
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
852 Slots = getRegMaskSlots();
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
853 Bits = getRegMaskBits();
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
854 }
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
855
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
856 // We are going to enumerate all the register mask slots contained in LI.
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
857 // Start with a binary search of RegMaskSlots to find a starting point.
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
858 ArrayRef<SlotIndex>::iterator SlotI =
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
859 std::lower_bound(Slots.begin(), Slots.end(), LiveI->start);
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
860 ArrayRef<SlotIndex>::iterator SlotE = Slots.end();
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
861
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
862 // No slots in range, LI begins after the last call.
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
863 if (SlotI == SlotE)
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
864 return false;
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
865
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
866 bool Found = false;
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
867 for (;;) {
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
868 assert(*SlotI >= LiveI->start);
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
869 // Loop over all slots overlapping this segment.
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
870 while (*SlotI < LiveI->end) {
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
871 // *SlotI overlaps LI. Collect mask bits.
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
872 if (!Found) {
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
873 // This is the first overlap. Initialize UsableRegs to all ones.
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
874 UsableRegs.clear();
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
875 UsableRegs.resize(TRI->getNumRegs(), true);
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
876 Found = true;
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
877 }
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
878 // Remove usable registers clobbered by this mask.
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
879 UsableRegs.clearBitsNotInMask(Bits[SlotI-Slots.begin()]);
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
880 if (++SlotI == SlotE)
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
881 return Found;
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
882 }
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
883 // *SlotI is beyond the current LI segment.
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
884 LiveI = LI.advanceTo(LiveI, *SlotI);
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
885 if (LiveI == LiveE)
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
886 return Found;
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
887 // Advance SlotI until it overlaps.
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
888 while (*SlotI < LiveI->start)
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
889 if (++SlotI == SlotE)
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
890 return Found;
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
891 }
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
892 }
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
893
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
894 //===----------------------------------------------------------------------===//
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
895 // IntervalUpdate class.
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
896 //===----------------------------------------------------------------------===//
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
897
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
898 // HMEditor is a toolkit used by handleMove to trim or extend live intervals.
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
899 class LiveIntervals::HMEditor {
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
900 private:
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
901 LiveIntervals& LIS;
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
902 const MachineRegisterInfo& MRI;
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
903 const TargetRegisterInfo& TRI;
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
904 SlotIndex OldIdx;
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
905 SlotIndex NewIdx;
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
906 SmallPtrSet<LiveRange*, 8> Updated;
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
907 bool UpdateFlags;
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
908
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
909 public:
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
910 HMEditor(LiveIntervals& LIS, const MachineRegisterInfo& MRI,
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
911 const TargetRegisterInfo& TRI,
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
912 SlotIndex OldIdx, SlotIndex NewIdx, bool UpdateFlags)
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
913 : LIS(LIS), MRI(MRI), TRI(TRI), OldIdx(OldIdx), NewIdx(NewIdx),
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
914 UpdateFlags(UpdateFlags) {}
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
915
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
916 // FIXME: UpdateFlags is a workaround that creates live intervals for all
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
917 // physregs, even those that aren't needed for regalloc, in order to update
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
918 // kill flags. This is wasteful. Eventually, LiveVariables will strip all kill
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
919 // flags, and postRA passes will use a live register utility instead.
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
920 LiveRange *getRegUnitLI(unsigned Unit) {
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
921 if (UpdateFlags)
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
922 return &LIS.getRegUnit(Unit);
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
923 return LIS.getCachedRegUnit(Unit);
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
924 }
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
925
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
926 /// Update all live ranges touched by MI, assuming a move from OldIdx to
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
927 /// NewIdx.
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
928 void updateAllRanges(MachineInstr *MI) {
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
929 DEBUG(dbgs() << "handleMove " << OldIdx << " -> " << NewIdx << ": " << *MI);
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
930 bool hasRegMask = false;
95
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 83
diff changeset
931 for (MachineOperand &MO : MI->operands()) {
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 83
diff changeset
932 if (MO.isRegMask())
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
933 hasRegMask = true;
95
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 83
diff changeset
934 if (!MO.isReg())
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
935 continue;
120
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
936 if (MO.isUse()) {
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
937 if (!MO.readsReg())
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
938 continue;
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
939 // Aggressively clear all kill flags.
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
940 // They are reinserted by VirtRegRewriter.
95
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 83
diff changeset
941 MO.setIsKill(false);
120
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
942 }
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
943
95
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 83
diff changeset
944 unsigned Reg = MO.getReg();
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
945 if (!Reg)
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
946 continue;
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
947 if (TargetRegisterInfo::isVirtualRegister(Reg)) {
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
948 LiveInterval &LI = LIS.getInterval(Reg);
83
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
949 if (LI.hasSubRanges()) {
95
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 83
diff changeset
950 unsigned SubReg = MO.getSubReg();
120
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
951 LaneBitmask LaneMask = SubReg ? TRI.getSubRegIndexLaneMask(SubReg)
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
952 : MRI.getMaxLaneMaskForVReg(Reg);
83
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
953 for (LiveInterval::SubRange &S : LI.subranges()) {
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
954 if ((S.LaneMask & LaneMask) == 0)
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
955 continue;
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
956 updateRange(S, Reg, S.LaneMask);
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
957 }
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
958 }
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
959 updateRange(LI, Reg, 0);
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
960 continue;
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
961 }
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
962
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
963 // For physregs, only update the regunits that actually have a
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
964 // precomputed live range.
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
965 for (MCRegUnitIterator Units(Reg, &TRI); Units.isValid(); ++Units)
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
966 if (LiveRange *LR = getRegUnitLI(*Units))
83
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
967 updateRange(*LR, *Units, 0);
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
968 }
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
969 if (hasRegMask)
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
970 updateRegMaskSlots();
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
971 }
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
972
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
973 private:
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
974 /// Update a single live range, assuming an instruction has been moved from
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
975 /// OldIdx to NewIdx.
95
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 83
diff changeset
976 void updateRange(LiveRange &LR, unsigned Reg, LaneBitmask LaneMask) {
83
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
977 if (!Updated.insert(&LR).second)
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
978 return;
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
979 DEBUG({
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
980 dbgs() << " ";
83
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
981 if (TargetRegisterInfo::isVirtualRegister(Reg)) {
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
982 dbgs() << PrintReg(Reg);
83
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
983 if (LaneMask != 0)
95
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 83
diff changeset
984 dbgs() << " L" << PrintLaneMask(LaneMask);
83
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
985 } else {
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
986 dbgs() << PrintRegUnit(Reg, &TRI);
83
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
987 }
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
988 dbgs() << ":\t" << LR << '\n';
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
989 });
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
990 if (SlotIndex::isEarlierInstr(OldIdx, NewIdx))
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
991 handleMoveDown(LR);
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
992 else
83
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
993 handleMoveUp(LR, Reg, LaneMask);
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
994 DEBUG(dbgs() << " -->\t" << LR << '\n');
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
995 LR.verify();
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
996 }
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
997
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
998 /// Update LR to reflect an instruction has been moved downwards from OldIdx
100
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
999 /// to NewIdx (OldIdx < NewIdx).
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1000 void handleMoveDown(LiveRange &LR) {
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1001 LiveRange::iterator E = LR.end();
100
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
1002 // Segment going into OldIdx.
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
1003 LiveRange::iterator OldIdxIn = LR.find(OldIdx.getBaseIndex());
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
1004
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
1005 // No value live before or after OldIdx? Nothing to do.
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
1006 if (OldIdxIn == E || SlotIndex::isEarlierInstr(OldIdx, OldIdxIn->start))
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1007 return;
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1008
100
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
1009 LiveRange::iterator OldIdxOut;
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
1010 // Do we have a value live-in to OldIdx?
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
1011 if (SlotIndex::isEarlierInstr(OldIdxIn->start, OldIdx)) {
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1012 // If the live-in value already extends to NewIdx, there is nothing to do.
100
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
1013 if (SlotIndex::isEarlierEqualInstr(NewIdx, OldIdxIn->end))
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1014 return;
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1015 // Aggressively remove all kill flags from the old kill point.
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1016 // Kill flags shouldn't be used while live intervals exist, they will be
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1017 // reinserted by VirtRegRewriter.
100
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
1018 if (MachineInstr *KillMI = LIS.getInstructionFromIndex(OldIdxIn->end))
120
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
1019 for (MIBundleOperands MO(*KillMI); MO.isValid(); ++MO)
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1020 if (MO->isReg() && MO->isUse())
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1021 MO->setIsKill(false);
120
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
1022
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
1023 // Is there a def before NewIdx which is not OldIdx?
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
1024 LiveRange::iterator Next = std::next(OldIdxIn);
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
1025 if (Next != E && !SlotIndex::isSameInstr(OldIdx, Next->start) &&
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
1026 SlotIndex::isEarlierInstr(Next->start, NewIdx)) {
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
1027 // If we are here then OldIdx was just a use but not a def. We only have
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
1028 // to ensure liveness extends to NewIdx.
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
1029 LiveRange::iterator NewIdxIn =
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
1030 LR.advanceTo(Next, NewIdx.getBaseIndex());
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
1031 // Extend the segment before NewIdx if necessary.
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
1032 if (NewIdxIn == E ||
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
1033 !SlotIndex::isEarlierInstr(NewIdxIn->start, NewIdx)) {
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
1034 LiveRange::iterator Prev = std::prev(NewIdxIn);
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
1035 Prev->end = NewIdx.getRegSlot();
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
1036 }
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
1037 // Extend OldIdxIn.
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
1038 OldIdxIn->end = Next->start;
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
1039 return;
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
1040 }
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
1041
100
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
1042 // Adjust OldIdxIn->end to reach NewIdx. This may temporarily make LR
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
1043 // invalid by overlapping ranges.
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
1044 bool isKill = SlotIndex::isSameInstr(OldIdx, OldIdxIn->end);
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
1045 OldIdxIn->end = NewIdx.getRegSlot(OldIdxIn->end.isEarlyClobber());
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
1046 // If this was not a kill, then there was no def and we're done.
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1047 if (!isKill)
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1048 return;
100
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
1049
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
1050 // Did we have a Def at OldIdx?
120
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
1051 OldIdxOut = Next;
100
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
1052 if (OldIdxOut == E || !SlotIndex::isSameInstr(OldIdx, OldIdxOut->start))
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
1053 return;
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
1054 } else {
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
1055 OldIdxOut = OldIdxIn;
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1056 }
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1057
100
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
1058 // If we are here then there is a Definition at OldIdx. OldIdxOut points
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
1059 // to the segment starting there.
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
1060 assert(OldIdxOut != E && SlotIndex::isSameInstr(OldIdx, OldIdxOut->start) &&
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
1061 "No def?");
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
1062 VNInfo *OldIdxVNI = OldIdxOut->valno;
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
1063 assert(OldIdxVNI->def == OldIdxOut->start && "Inconsistent def");
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
1064
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
1065 // If the defined value extends beyond NewIdx, just move the beginning
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
1066 // of the segment to NewIdx.
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
1067 SlotIndex NewIdxDef = NewIdx.getRegSlot(OldIdxOut->start.isEarlyClobber());
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
1068 if (SlotIndex::isEarlierInstr(NewIdxDef, OldIdxOut->end)) {
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
1069 OldIdxVNI->def = NewIdxDef;
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
1070 OldIdxOut->start = OldIdxVNI->def;
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1071 return;
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1072 }
100
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
1073
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
1074 // If we are here then we have a Definition at OldIdx which ends before
120
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
1075 // NewIdx.
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
1076
100
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
1077 // Is there an existing Def at NewIdx?
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
1078 LiveRange::iterator AfterNewIdx
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
1079 = LR.advanceTo(OldIdxOut, NewIdx.getRegSlot());
120
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
1080 bool OldIdxDefIsDead = OldIdxOut->end.isDead();
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
1081 if (!OldIdxDefIsDead &&
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
1082 SlotIndex::isEarlierInstr(OldIdxOut->end, NewIdxDef)) {
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
1083 // OldIdx is not a dead def, and NewIdxDef is inside a new interval.
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
1084 VNInfo *DefVNI;
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
1085 if (OldIdxOut != LR.begin() &&
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
1086 !SlotIndex::isEarlierInstr(std::prev(OldIdxOut)->end,
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
1087 OldIdxOut->start)) {
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
1088 // There is no gap between OldIdxOut and its predecessor anymore,
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
1089 // merge them.
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
1090 LiveRange::iterator IPrev = std::prev(OldIdxOut);
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
1091 DefVNI = OldIdxVNI;
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
1092 IPrev->end = OldIdxOut->end;
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
1093 } else {
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
1094 // The value is live in to OldIdx
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
1095 LiveRange::iterator INext = std::next(OldIdxOut);
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
1096 assert(INext != E && "Must have following segment");
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
1097 // We merge OldIdxOut and its successor. As we're dealing with subreg
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
1098 // reordering, there is always a successor to OldIdxOut in the same BB
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
1099 // We don't need INext->valno anymore and will reuse for the new segment
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
1100 // we create later.
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
1101 DefVNI = OldIdxVNI;
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
1102 INext->start = OldIdxOut->end;
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
1103 INext->valno->def = INext->start;
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
1104 }
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
1105 // If NewIdx is behind the last segment, extend that and append a new one.
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
1106 if (AfterNewIdx == E) {
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
1107 // OldIdxOut is undef at this point, Slide (OldIdxOut;AfterNewIdx] up
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
1108 // one position.
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
1109 // |- ?/OldIdxOut -| |- X0 -| ... |- Xn -| end
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
1110 // => |- X0/OldIdxOut -| ... |- Xn -| |- undef/NewS -| end
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
1111 std::copy(std::next(OldIdxOut), E, OldIdxOut);
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
1112 // The last segment is undefined now, reuse it for a dead def.
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
1113 LiveRange::iterator NewSegment = std::prev(E);
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
1114 *NewSegment = LiveRange::Segment(NewIdxDef, NewIdxDef.getDeadSlot(),
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
1115 DefVNI);
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
1116 DefVNI->def = NewIdxDef;
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
1117
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
1118 LiveRange::iterator Prev = std::prev(NewSegment);
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
1119 Prev->end = NewIdxDef;
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
1120 } else {
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
1121 // OldIdxOut is undef at this point, Slide (OldIdxOut;AfterNewIdx] up
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
1122 // one position.
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
1123 // |- ?/OldIdxOut -| |- X0 -| ... |- Xn/AfterNewIdx -| |- Next -|
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
1124 // => |- X0/OldIdxOut -| ... |- Xn -| |- Xn/AfterNewIdx -| |- Next -|
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
1125 std::copy(std::next(OldIdxOut), std::next(AfterNewIdx), OldIdxOut);
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
1126 LiveRange::iterator Prev = std::prev(AfterNewIdx);
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
1127 // We have two cases:
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
1128 if (SlotIndex::isEarlierInstr(Prev->start, NewIdxDef)) {
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
1129 // Case 1: NewIdx is inside a liverange. Split this liverange at
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
1130 // NewIdxDef into the segment "Prev" followed by "NewSegment".
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
1131 LiveRange::iterator NewSegment = AfterNewIdx;
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
1132 *NewSegment = LiveRange::Segment(NewIdxDef, Prev->end, Prev->valno);
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
1133 Prev->valno->def = NewIdxDef;
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
1134
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
1135 *Prev = LiveRange::Segment(Prev->start, NewIdxDef, DefVNI);
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
1136 DefVNI->def = Prev->start;
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
1137 } else {
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
1138 // Case 2: NewIdx is in a lifetime hole. Keep AfterNewIdx as is and
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
1139 // turn Prev into a segment from NewIdx to AfterNewIdx->start.
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
1140 *Prev = LiveRange::Segment(NewIdxDef, AfterNewIdx->start, DefVNI);
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
1141 DefVNI->def = NewIdxDef;
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
1142 assert(DefVNI != AfterNewIdx->valno);
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
1143 }
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
1144 }
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
1145 return;
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
1146 }
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
1147
100
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
1148 if (AfterNewIdx != E &&
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
1149 SlotIndex::isSameInstr(AfterNewIdx->start, NewIdxDef)) {
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
1150 // There is an existing def at NewIdx. The def at OldIdx is coalesced into
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
1151 // that value.
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
1152 assert(AfterNewIdx->valno != OldIdxVNI && "Multiple defs of value?");
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
1153 LR.removeValNo(OldIdxVNI);
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
1154 } else {
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
1155 // There was no existing def at NewIdx. We need to create a dead def
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
1156 // at NewIdx. Shift segments over the old OldIdxOut segment, this frees
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
1157 // a new segment at the place where we want to construct the dead def.
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
1158 // |- OldIdxOut -| |- X0 -| ... |- Xn -| |- AfterNewIdx -|
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
1159 // => |- X0/OldIdxOut -| ... |- Xn -| |- undef/NewS. -| |- AfterNewIdx -|
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
1160 assert(AfterNewIdx != OldIdxOut && "Inconsistent iterators");
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
1161 std::copy(std::next(OldIdxOut), AfterNewIdx, OldIdxOut);
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
1162 // We can reuse OldIdxVNI now.
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
1163 LiveRange::iterator NewSegment = std::prev(AfterNewIdx);
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
1164 VNInfo *NewSegmentVNI = OldIdxVNI;
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
1165 NewSegmentVNI->def = NewIdxDef;
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
1166 *NewSegment = LiveRange::Segment(NewIdxDef, NewIdxDef.getDeadSlot(),
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
1167 NewSegmentVNI);
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1168 }
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1169 }
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1170
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1171 /// Update LR to reflect an instruction has been moved upwards from OldIdx
100
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
1172 /// to NewIdx (NewIdx < OldIdx).
95
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 83
diff changeset
1173 void handleMoveUp(LiveRange &LR, unsigned Reg, LaneBitmask LaneMask) {
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1174 LiveRange::iterator E = LR.end();
100
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
1175 // Segment going into OldIdx.
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
1176 LiveRange::iterator OldIdxIn = LR.find(OldIdx.getBaseIndex());
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
1177
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
1178 // No value live before or after OldIdx? Nothing to do.
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
1179 if (OldIdxIn == E || SlotIndex::isEarlierInstr(OldIdx, OldIdxIn->start))
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1180 return;
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1181
100
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
1182 LiveRange::iterator OldIdxOut;
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
1183 // Do we have a value live-in to OldIdx?
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
1184 if (SlotIndex::isEarlierInstr(OldIdxIn->start, OldIdx)) {
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
1185 // If the live-in value isn't killed here, then we have no Def at
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
1186 // OldIdx, moreover the value must be live at NewIdx so there is nothing
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
1187 // to do.
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
1188 bool isKill = SlotIndex::isSameInstr(OldIdx, OldIdxIn->end);
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
1189 if (!isKill)
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1190 return;
100
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
1191
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
1192 // At this point we have to move OldIdxIn->end back to the nearest
120
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
1193 // previous use or (dead-)def but no further than NewIdx.
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
1194 SlotIndex DefBeforeOldIdx
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
1195 = std::max(OldIdxIn->start.getDeadSlot(),
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
1196 NewIdx.getRegSlot(OldIdxIn->end.isEarlyClobber()));
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
1197 OldIdxIn->end = findLastUseBefore(DefBeforeOldIdx, Reg, LaneMask);
100
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
1198
120
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
1199 // Did we have a Def at OldIdx? If not we are done now.
100
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
1200 OldIdxOut = std::next(OldIdxIn);
120
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
1201 if (OldIdxOut == E || !SlotIndex::isSameInstr(OldIdx, OldIdxOut->start))
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1202 return;
100
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
1203 } else {
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
1204 OldIdxOut = OldIdxIn;
120
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
1205 OldIdxIn = OldIdxOut != LR.begin() ? std::prev(OldIdxOut) : E;
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1206 }
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1207
100
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
1208 // If we are here then there is a Definition at OldIdx. OldIdxOut points
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
1209 // to the segment starting there.
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
1210 assert(OldIdxOut != E && SlotIndex::isSameInstr(OldIdx, OldIdxOut->start) &&
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
1211 "No def?");
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
1212 VNInfo *OldIdxVNI = OldIdxOut->valno;
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
1213 assert(OldIdxVNI->def == OldIdxOut->start && "Inconsistent def");
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
1214 bool OldIdxDefIsDead = OldIdxOut->end.isDead();
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1215
100
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
1216 // Is there an existing def at NewIdx?
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
1217 SlotIndex NewIdxDef = NewIdx.getRegSlot(OldIdxOut->start.isEarlyClobber());
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
1218 LiveRange::iterator NewIdxOut = LR.find(NewIdx.getRegSlot());
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
1219 if (SlotIndex::isSameInstr(NewIdxOut->start, NewIdx)) {
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
1220 assert(NewIdxOut->valno != OldIdxVNI &&
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
1221 "Same value defined more than once?");
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
1222 // If OldIdx was a dead def remove it.
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
1223 if (!OldIdxDefIsDead) {
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
1224 // Remove segment starting at NewIdx and move begin of OldIdxOut to
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
1225 // NewIdx so it can take its place.
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
1226 OldIdxVNI->def = NewIdxDef;
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
1227 OldIdxOut->start = NewIdxDef;
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
1228 LR.removeValNo(NewIdxOut->valno);
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
1229 } else {
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
1230 // Simply remove the dead def at OldIdx.
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
1231 LR.removeValNo(OldIdxVNI);
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1232 }
100
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
1233 } else {
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
1234 // Previously nothing was live after NewIdx, so all we have to do now is
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
1235 // move the begin of OldIdxOut to NewIdx.
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
1236 if (!OldIdxDefIsDead) {
120
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
1237 // Do we have any intermediate Defs between OldIdx and NewIdx?
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
1238 if (OldIdxIn != E &&
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
1239 SlotIndex::isEarlierInstr(NewIdxDef, OldIdxIn->start)) {
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
1240 // OldIdx is not a dead def and NewIdx is before predecessor start.
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
1241 LiveRange::iterator NewIdxIn = NewIdxOut;
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
1242 assert(NewIdxIn == LR.find(NewIdx.getBaseIndex()));
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
1243 const SlotIndex SplitPos = NewIdxDef;
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
1244
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
1245 // Merge the OldIdxIn and OldIdxOut segments into OldIdxOut.
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
1246 *OldIdxOut = LiveRange::Segment(OldIdxIn->start, OldIdxOut->end,
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
1247 OldIdxIn->valno);
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
1248 // OldIdxIn and OldIdxVNI are now undef and can be overridden.
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
1249 // We Slide [NewIdxIn, OldIdxIn) down one position.
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
1250 // |- X0/NewIdxIn -| ... |- Xn-1 -||- Xn/OldIdxIn -||- OldIdxOut -|
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
1251 // => |- undef/NexIdxIn -| |- X0 -| ... |- Xn-1 -| |- Xn/OldIdxOut -|
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
1252 std::copy_backward(NewIdxIn, OldIdxIn, OldIdxOut);
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
1253 // NewIdxIn is now considered undef so we can reuse it for the moved
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
1254 // value.
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
1255 LiveRange::iterator NewSegment = NewIdxIn;
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
1256 LiveRange::iterator Next = std::next(NewSegment);
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
1257 if (SlotIndex::isEarlierInstr(Next->start, NewIdx)) {
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
1258 // There is no gap between NewSegment and its predecessor.
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
1259 *NewSegment = LiveRange::Segment(Next->start, SplitPos,
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
1260 Next->valno);
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
1261 *Next = LiveRange::Segment(SplitPos, Next->end, OldIdxVNI);
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
1262 Next->valno->def = SplitPos;
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
1263 } else {
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
1264 // There is a gap between NewSegment and its predecessor
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
1265 // Value becomes live in.
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
1266 *NewSegment = LiveRange::Segment(SplitPos, Next->start, OldIdxVNI);
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
1267 NewSegment->valno->def = SplitPos;
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
1268 }
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
1269 } else {
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
1270 // Leave the end point of a live def.
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
1271 OldIdxOut->start = NewIdxDef;
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
1272 OldIdxVNI->def = NewIdxDef;
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
1273 if (OldIdxIn != E && SlotIndex::isEarlierInstr(NewIdx, OldIdxIn->end))
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
1274 OldIdxIn->end = NewIdx.getRegSlot();
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
1275 }
100
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
1276 } else {
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
1277 // OldIdxVNI is a dead def. It may have been moved across other values
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
1278 // in LR, so move OldIdxOut up to NewIdxOut. Slide [NewIdxOut;OldIdxOut)
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
1279 // down one position.
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
1280 // |- X0/NewIdxOut -| ... |- Xn-1 -| |- Xn/OldIdxOut -| |- next - |
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
1281 // => |- undef/NewIdxOut -| |- X0 -| ... |- Xn-1 -| |- next -|
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
1282 std::copy_backward(NewIdxOut, OldIdxOut, std::next(OldIdxOut));
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
1283 // OldIdxVNI can be reused now to build a new dead def segment.
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
1284 LiveRange::iterator NewSegment = NewIdxOut;
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
1285 VNInfo *NewSegmentVNI = OldIdxVNI;
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
1286 *NewSegment = LiveRange::Segment(NewIdxDef, NewIdxDef.getDeadSlot(),
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
1287 NewSegmentVNI);
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
1288 NewSegmentVNI->def = NewIdxDef;
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
1289 }
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1290 }
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1291 }
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1292
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1293 void updateRegMaskSlots() {
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1294 SmallVectorImpl<SlotIndex>::iterator RI =
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1295 std::lower_bound(LIS.RegMaskSlots.begin(), LIS.RegMaskSlots.end(),
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1296 OldIdx);
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1297 assert(RI != LIS.RegMaskSlots.end() && *RI == OldIdx.getRegSlot() &&
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1298 "No RegMask at OldIdx.");
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1299 *RI = NewIdx.getRegSlot();
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1300 assert((RI == LIS.RegMaskSlots.begin() ||
77
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
1301 SlotIndex::isEarlierInstr(*std::prev(RI), *RI)) &&
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
1302 "Cannot move regmask instruction above another call");
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
1303 assert((std::next(RI) == LIS.RegMaskSlots.end() ||
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
1304 SlotIndex::isEarlierInstr(*RI, *std::next(RI))) &&
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
1305 "Cannot move regmask instruction below another call");
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1306 }
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1307
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1308 // Return the last use of reg between NewIdx and OldIdx.
120
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
1309 SlotIndex findLastUseBefore(SlotIndex Before, unsigned Reg,
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
1310 LaneBitmask LaneMask) {
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1311 if (TargetRegisterInfo::isVirtualRegister(Reg)) {
120
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
1312 SlotIndex LastUse = Before;
83
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
1313 for (MachineOperand &MO : MRI.use_nodbg_operands(Reg)) {
120
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
1314 if (MO.isUndef())
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
1315 continue;
83
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
1316 unsigned SubReg = MO.getSubReg();
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
1317 if (SubReg != 0 && LaneMask != 0
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
1318 && (TRI.getSubRegIndexLaneMask(SubReg) & LaneMask) == 0)
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
1319 continue;
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
1320
120
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
1321 const MachineInstr &MI = *MO.getParent();
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1322 SlotIndex InstSlot = LIS.getSlotIndexes()->getInstructionIndex(MI);
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1323 if (InstSlot > LastUse && InstSlot < OldIdx)
120
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
1324 LastUse = InstSlot.getRegSlot();
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1325 }
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1326 return LastUse;
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1327 }
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1328
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1329 // This is a regunit interval, so scanning the use list could be very
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1330 // expensive. Scan upwards from OldIdx instead.
120
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
1331 assert(Before < OldIdx && "Expected upwards move");
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1332 SlotIndexes *Indexes = LIS.getSlotIndexes();
120
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
1333 MachineBasicBlock *MBB = Indexes->getMBBFromIndex(Before);
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1334
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1335 // OldIdx may not correspond to an instruction any longer, so set MII to
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1336 // point to the next instruction after OldIdx, or MBB->end().
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1337 MachineBasicBlock::iterator MII = MBB->end();
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1338 if (MachineInstr *MI = Indexes->getInstructionFromIndex(
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1339 Indexes->getNextNonNullIndex(OldIdx)))
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1340 if (MI->getParent() == MBB)
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1341 MII = MI;
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1342
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1343 MachineBasicBlock::iterator Begin = MBB->begin();
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1344 while (MII != Begin) {
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1345 if ((--MII)->isDebugValue())
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1346 continue;
120
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
1347 SlotIndex Idx = Indexes->getInstructionIndex(*MII);
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1348
120
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
1349 // Stop searching when Before is reached.
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
1350 if (!SlotIndex::isEarlierInstr(Before, Idx))
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
1351 return Before;
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1352
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1353 // Check if MII uses Reg.
120
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
1354 for (MIBundleOperands MO(*MII); MO.isValid(); ++MO)
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
1355 if (MO->isReg() && !MO->isUndef() &&
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1356 TargetRegisterInfo::isPhysicalRegister(MO->getReg()) &&
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1357 TRI.hasRegUnit(MO->getReg(), Reg))
120
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
1358 return Idx.getRegSlot();
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1359 }
120
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
1360 // Didn't reach Before. It must be the first instruction in the block.
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
1361 return Before;
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1362 }
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1363 };
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1364
120
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
1365 void LiveIntervals::handleMove(MachineInstr &MI, bool UpdateFlags) {
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
1366 assert(!MI.isBundled() && "Can't handle bundled instructions yet.");
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1367 SlotIndex OldIndex = Indexes->getInstructionIndex(MI);
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1368 Indexes->removeMachineInstrFromMaps(MI);
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1369 SlotIndex NewIndex = Indexes->insertMachineInstrInMaps(MI);
120
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
1370 assert(getMBBStartIdx(MI.getParent()) <= OldIndex &&
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
1371 OldIndex < getMBBEndIdx(MI.getParent()) &&
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1372 "Cannot handle moves across basic block boundaries.");
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1373
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1374 HMEditor HME(*this, *MRI, *TRI, OldIndex, NewIndex, UpdateFlags);
120
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
1375 HME.updateAllRanges(&MI);
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1376 }
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1377
120
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
1378 void LiveIntervals::handleMoveIntoBundle(MachineInstr &MI,
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
1379 MachineInstr &BundleStart,
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1380 bool UpdateFlags) {
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1381 SlotIndex OldIndex = Indexes->getInstructionIndex(MI);
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1382 SlotIndex NewIndex = Indexes->getInstructionIndex(BundleStart);
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1383 HMEditor HME(*this, *MRI, *TRI, OldIndex, NewIndex, UpdateFlags);
120
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
1384 HME.updateAllRanges(&MI);
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1385 }
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1386
83
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
1387 void LiveIntervals::repairOldRegInRange(const MachineBasicBlock::iterator Begin,
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
1388 const MachineBasicBlock::iterator End,
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
1389 const SlotIndex endIdx,
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
1390 LiveRange &LR, const unsigned Reg,
95
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 83
diff changeset
1391 LaneBitmask LaneMask) {
83
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
1392 LiveInterval::iterator LII = LR.find(endIdx);
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
1393 SlotIndex lastUseIdx;
120
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
1394 if (LII == LR.begin()) {
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
1395 // This happens when the function is called for a subregister that only
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
1396 // occurs _after_ the range that is to be repaired.
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
1397 return;
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
1398 }
83
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
1399 if (LII != LR.end() && LII->start < endIdx)
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
1400 lastUseIdx = LII->end;
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
1401 else
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
1402 --LII;
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
1403
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
1404 for (MachineBasicBlock::iterator I = End; I != Begin;) {
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
1405 --I;
120
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
1406 MachineInstr &MI = *I;
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
1407 if (MI.isDebugValue())
83
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
1408 continue;
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
1409
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
1410 SlotIndex instrIdx = getInstructionIndex(MI);
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
1411 bool isStartValid = getInstructionFromIndex(LII->start);
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
1412 bool isEndValid = getInstructionFromIndex(LII->end);
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
1413
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
1414 // FIXME: This doesn't currently handle early-clobber or multiple removed
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
1415 // defs inside of the region to repair.
120
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
1416 for (MachineInstr::mop_iterator OI = MI.operands_begin(),
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
1417 OE = MI.operands_end();
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
1418 OI != OE; ++OI) {
83
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
1419 const MachineOperand &MO = *OI;
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
1420 if (!MO.isReg() || MO.getReg() != Reg)
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
1421 continue;
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
1422
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
1423 unsigned SubReg = MO.getSubReg();
95
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 83
diff changeset
1424 LaneBitmask Mask = TRI->getSubRegIndexLaneMask(SubReg);
83
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
1425 if ((Mask & LaneMask) == 0)
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
1426 continue;
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
1427
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
1428 if (MO.isDef()) {
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
1429 if (!isStartValid) {
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
1430 if (LII->end.isDead()) {
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
1431 SlotIndex prevStart;
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
1432 if (LII != LR.begin())
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
1433 prevStart = std::prev(LII)->start;
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
1434
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
1435 // FIXME: This could be more efficient if there was a
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
1436 // removeSegment method that returned an iterator.
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
1437 LR.removeSegment(*LII, true);
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
1438 if (prevStart.isValid())
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
1439 LII = LR.find(prevStart);
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
1440 else
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
1441 LII = LR.begin();
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
1442 } else {
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
1443 LII->start = instrIdx.getRegSlot();
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
1444 LII->valno->def = instrIdx.getRegSlot();
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
1445 if (MO.getSubReg() && !MO.isUndef())
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
1446 lastUseIdx = instrIdx.getRegSlot();
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
1447 else
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
1448 lastUseIdx = SlotIndex();
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
1449 continue;
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
1450 }
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
1451 }
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
1452
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
1453 if (!lastUseIdx.isValid()) {
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
1454 VNInfo *VNI = LR.getNextValue(instrIdx.getRegSlot(), VNInfoAllocator);
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
1455 LiveRange::Segment S(instrIdx.getRegSlot(),
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
1456 instrIdx.getDeadSlot(), VNI);
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
1457 LII = LR.addSegment(S);
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
1458 } else if (LII->start != instrIdx.getRegSlot()) {
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
1459 VNInfo *VNI = LR.getNextValue(instrIdx.getRegSlot(), VNInfoAllocator);
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
1460 LiveRange::Segment S(instrIdx.getRegSlot(), lastUseIdx, VNI);
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
1461 LII = LR.addSegment(S);
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
1462 }
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
1463
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
1464 if (MO.getSubReg() && !MO.isUndef())
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
1465 lastUseIdx = instrIdx.getRegSlot();
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
1466 else
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
1467 lastUseIdx = SlotIndex();
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
1468 } else if (MO.isUse()) {
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
1469 // FIXME: This should probably be handled outside of this branch,
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
1470 // either as part of the def case (for defs inside of the region) or
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
1471 // after the loop over the region.
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
1472 if (!isEndValid && !LII->end.isBlock())
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
1473 LII->end = instrIdx.getRegSlot();
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
1474 if (!lastUseIdx.isValid())
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
1475 lastUseIdx = instrIdx.getRegSlot();
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
1476 }
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
1477 }
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
1478 }
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
1479 }
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
1480
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1481 void
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1482 LiveIntervals::repairIntervalsInRange(MachineBasicBlock *MBB,
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1483 MachineBasicBlock::iterator Begin,
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1484 MachineBasicBlock::iterator End,
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1485 ArrayRef<unsigned> OrigRegs) {
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1486 // Find anchor points, which are at the beginning/end of blocks or at
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1487 // instructions that already have indexes.
120
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
1488 while (Begin != MBB->begin() && !Indexes->hasIndex(*Begin))
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1489 --Begin;
120
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
1490 while (End != MBB->end() && !Indexes->hasIndex(*End))
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1491 ++End;
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1492
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1493 SlotIndex endIdx;
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1494 if (End == MBB->end())
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1495 endIdx = getMBBEndIdx(MBB).getPrevSlot();
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1496 else
120
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
1497 endIdx = getInstructionIndex(*End);
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1498
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1499 Indexes->repairIndexesInRange(MBB, Begin, End);
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1500
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1501 for (MachineBasicBlock::iterator I = End; I != Begin;) {
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1502 --I;
120
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
1503 MachineInstr &MI = *I;
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
1504 if (MI.isDebugValue())
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1505 continue;
120
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
1506 for (MachineInstr::const_mop_iterator MOI = MI.operands_begin(),
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
1507 MOE = MI.operands_end();
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
1508 MOI != MOE; ++MOI) {
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1509 if (MOI->isReg() &&
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1510 TargetRegisterInfo::isVirtualRegister(MOI->getReg()) &&
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1511 !hasInterval(MOI->getReg())) {
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1512 createAndComputeVirtRegInterval(MOI->getReg());
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1513 }
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1514 }
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1515 }
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1516
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1517 for (unsigned i = 0, e = OrigRegs.size(); i != e; ++i) {
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1518 unsigned Reg = OrigRegs[i];
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1519 if (!TargetRegisterInfo::isVirtualRegister(Reg))
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1520 continue;
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1521
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1522 LiveInterval &LI = getInterval(Reg);
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1523 // FIXME: Should we support undefs that gain defs?
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1524 if (!LI.hasAtLeastOneValue())
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1525 continue;
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1526
83
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
1527 for (LiveInterval::SubRange &S : LI.subranges()) {
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
1528 repairOldRegInRange(Begin, End, endIdx, S, Reg, S.LaneMask);
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
1529 }
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
1530 repairOldRegInRange(Begin, End, endIdx, LI, Reg);
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
1531 }
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
1532 }
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1533
83
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
1534 void LiveIntervals::removePhysRegDefAt(unsigned Reg, SlotIndex Pos) {
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
1535 for (MCRegUnitIterator Units(Reg, TRI); Units.isValid(); ++Units) {
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
1536 if (LiveRange *LR = getCachedRegUnit(*Units))
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
1537 if (VNInfo *VNI = LR->getVNInfoAt(Pos))
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
1538 LR->removeValNo(VNI);
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1539 }
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1540 }
83
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
1541
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
1542 void LiveIntervals::removeVRegDefAt(LiveInterval &LI, SlotIndex Pos) {
120
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
1543 // LI may not have the main range computed yet, but its subranges may
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
1544 // be present.
83
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
1545 VNInfo *VNI = LI.getVNInfoAt(Pos);
120
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
1546 if (VNI != nullptr) {
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
1547 assert(VNI->def.getBaseIndex() == Pos.getBaseIndex());
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
1548 LI.removeValNo(VNI);
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
1549 }
83
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
1550
120
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
1551 // Also remove the value defined in subranges.
83
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
1552 for (LiveInterval::SubRange &S : LI.subranges()) {
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
1553 if (VNInfo *SVNI = S.getVNInfoAt(Pos))
120
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
1554 if (SVNI->def.getBaseIndex() == Pos.getBaseIndex())
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
1555 S.removeValNo(SVNI);
83
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
1556 }
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
1557 LI.removeEmptySubRanges();
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
1558 }
95
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 83
diff changeset
1559
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 83
diff changeset
1560 void LiveIntervals::splitSeparateComponents(LiveInterval &LI,
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 83
diff changeset
1561 SmallVectorImpl<LiveInterval*> &SplitLIs) {
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 83
diff changeset
1562 ConnectedVNInfoEqClasses ConEQ(*this);
100
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
1563 unsigned NumComp = ConEQ.Classify(LI);
95
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 83
diff changeset
1564 if (NumComp <= 1)
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 83
diff changeset
1565 return;
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 83
diff changeset
1566 DEBUG(dbgs() << " Split " << NumComp << " components: " << LI << '\n');
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 83
diff changeset
1567 unsigned Reg = LI.reg;
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 83
diff changeset
1568 const TargetRegisterClass *RegClass = MRI->getRegClass(Reg);
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 83
diff changeset
1569 for (unsigned I = 1; I < NumComp; ++I) {
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 83
diff changeset
1570 unsigned NewVReg = MRI->createVirtualRegister(RegClass);
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 83
diff changeset
1571 LiveInterval &NewLI = createEmptyInterval(NewVReg);
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 83
diff changeset
1572 SplitLIs.push_back(&NewLI);
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 83
diff changeset
1573 }
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 83
diff changeset
1574 ConEQ.Distribute(LI, SplitLIs.data(), *MRI);
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 83
diff changeset
1575 }
100
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
1576
120
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
1577 void LiveIntervals::constructMainRangeFromSubranges(LiveInterval &LI) {
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
1578 assert(LRCalc && "LRCalc not initialized.");
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
1579 LRCalc->reset(MF, getSlotIndexes(), DomTree, &getVNInfoAllocator());
1172e4bd9c6f update 4.0.0
mir3636
parents: 100
diff changeset
1580 LRCalc->constructMainRangeFromSubranges(LI);
100
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
1581 }