annotate lib/Target/Hexagon/HexagonBlockRanges.h @ 120:1172e4bd9c6f

update 4.0.0
author mir3636
date Fri, 25 Nov 2016 19:14:25 +0900
parents
children 803732b1fca8
Ignore whitespace changes - Everywhere: Within whitespace: At end of lines:
rev   line source
120
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
1 //===--- HexagonBlockRanges.h ---------------------------------------------===//
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
2 //
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
3 // The LLVM Compiler Infrastructure
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
4 //
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
5 // This file is distributed under the University of Illinois Open Source
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
6 // License. See LICENSE.TXT for details.
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
7 //
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
8 //===----------------------------------------------------------------------===//
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
9 #ifndef HEXAGON_BLOCK_RANGES_H
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
10 #define HEXAGON_BLOCK_RANGES_H
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
11
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
12 #include "llvm/ADT/BitVector.h"
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
13 #include "llvm/CodeGen/MachineBasicBlock.h"
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
14 #include "llvm/MC/MCRegisterInfo.h" // For MCPhysReg.
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
15 #include <map>
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
16 #include <set>
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
17 #include <vector>
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
18
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
19 namespace llvm {
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
20 class Function;
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
21 class HexagonSubtarget;
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
22 class MachineBasicBlock;
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
23 class MachineFunction;
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
24 class MachineInstr;
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
25 class MCInstrDesc;
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
26 class raw_ostream;
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
27 class TargetInstrInfo;
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
28 class TargetRegisterClass;
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
29 class TargetRegisterInfo;
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
30 class Type;
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
31
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
32 struct HexagonBlockRanges {
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
33 HexagonBlockRanges(MachineFunction &MF);
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
34
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
35 struct RegisterRef {
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
36 unsigned Reg, Sub;
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
37 bool operator<(RegisterRef R) const {
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
38 return Reg < R.Reg || (Reg == R.Reg && Sub < R.Sub);
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
39 }
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
40 };
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
41 typedef std::set<RegisterRef> RegisterSet;
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
42
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
43 // This is to represent an "index", which is an abstraction of a position
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
44 // of an instruction within a basic block.
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
45 class IndexType {
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
46 public:
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
47 enum : unsigned {
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
48 None = 0,
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
49 Entry = 1,
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
50 Exit = 2,
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
51 First = 11 // 10th + 1st
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
52 };
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
53 static bool isInstr(IndexType X) { return X.Index >= First; }
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
54
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
55 IndexType() : Index(None) {}
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
56 IndexType(unsigned Idx) : Index(Idx) {}
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
57 operator unsigned() const;
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
58 bool operator== (unsigned x) const;
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
59 bool operator== (IndexType Idx) const;
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
60 bool operator!= (unsigned x) const;
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
61 bool operator!= (IndexType Idx) const;
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
62 IndexType operator++ ();
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
63 bool operator< (unsigned Idx) const;
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
64 bool operator< (IndexType Idx) const;
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
65 bool operator<= (IndexType Idx) const;
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
66
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
67 private:
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
68 bool operator> (IndexType Idx) const;
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
69 bool operator>= (IndexType Idx) const;
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
70
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
71 unsigned Index;
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
72 };
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
73
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
74 // A range of indices, essentially a representation of a live range.
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
75 // This is also used to represent "dead ranges", i.e. ranges where a
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
76 // register is dead.
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
77 class IndexRange : public std::pair<IndexType,IndexType> {
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
78 public:
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
79 IndexRange() : Fixed(false), TiedEnd(false) {}
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
80 IndexRange(IndexType Start, IndexType End, bool F = false, bool T = false)
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
81 : std::pair<IndexType,IndexType>(Start, End), Fixed(F), TiedEnd(T) {}
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
82 IndexType start() const { return first; }
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
83 IndexType end() const { return second; }
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
84
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
85 bool operator< (const IndexRange &A) const {
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
86 return start() < A.start();
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
87 }
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
88 bool overlaps(const IndexRange &A) const;
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
89 bool contains(const IndexRange &A) const;
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
90 void merge(const IndexRange &A);
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
91
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
92 bool Fixed; // Can be renamed? "Fixed" means "no".
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
93 bool TiedEnd; // The end is not a use, but a dead def tied to a use.
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
94
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
95 private:
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
96 void setStart(const IndexType &S) { first = S; }
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
97 void setEnd(const IndexType &E) { second = E; }
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
98 };
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
99
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
100 // A list of index ranges. This represents liveness of a register
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
101 // in a basic block.
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
102 class RangeList : public std::vector<IndexRange> {
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
103 public:
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
104 void add(IndexType Start, IndexType End, bool Fixed, bool TiedEnd) {
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
105 push_back(IndexRange(Start, End, Fixed, TiedEnd));
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
106 }
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
107 void add(const IndexRange &Range) {
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
108 push_back(Range);
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
109 }
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
110 void include(const RangeList &RL);
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
111 void unionize(bool MergeAdjacent = false);
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
112 void subtract(const IndexRange &Range);
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
113
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
114 private:
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
115 void addsub(const IndexRange &A, const IndexRange &B);
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
116 };
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
117
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
118 class InstrIndexMap {
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
119 public:
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
120 InstrIndexMap(MachineBasicBlock &B);
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
121 MachineInstr *getInstr(IndexType Idx) const;
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
122 IndexType getIndex(MachineInstr *MI) const;
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
123 MachineBasicBlock &getBlock() const { return Block; }
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
124 IndexType getPrevIndex(IndexType Idx) const;
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
125 IndexType getNextIndex(IndexType Idx) const;
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
126 void replaceInstr(MachineInstr *OldMI, MachineInstr *NewMI);
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
127
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
128 friend raw_ostream &operator<< (raw_ostream &OS, const InstrIndexMap &Map);
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
129 IndexType First, Last;
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
130
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
131 private:
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
132 MachineBasicBlock &Block;
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
133 std::map<IndexType,MachineInstr*> Map;
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
134 };
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
135
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
136 typedef std::map<RegisterRef,RangeList> RegToRangeMap;
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
137 RegToRangeMap computeLiveMap(InstrIndexMap &IndexMap);
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
138 RegToRangeMap computeDeadMap(InstrIndexMap &IndexMap, RegToRangeMap &LiveMap);
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
139 static RegisterSet expandToSubRegs(RegisterRef R,
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
140 const MachineRegisterInfo &MRI, const TargetRegisterInfo &TRI);
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
141
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
142 struct PrintRangeMap {
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
143 PrintRangeMap(const RegToRangeMap &M, const TargetRegisterInfo &I)
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
144 : Map(M), TRI(I) {}
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
145
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
146 friend raw_ostream &operator<< (raw_ostream &OS, const PrintRangeMap &P);
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
147 private:
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
148 const RegToRangeMap &Map;
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
149 const TargetRegisterInfo &TRI;
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
150 };
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
151
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
152 private:
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
153 RegisterSet getLiveIns(const MachineBasicBlock &B,
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
154 const MachineRegisterInfo &MRI, const TargetRegisterInfo &TRI);
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
155
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
156 void computeInitialLiveRanges(InstrIndexMap &IndexMap,
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
157 RegToRangeMap &LiveMap);
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
158
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
159 MachineFunction &MF;
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
160 const HexagonSubtarget &HST;
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
161 const TargetInstrInfo &TII;
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
162 const TargetRegisterInfo &TRI;
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
163 BitVector Reserved;
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
164 };
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
165
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
166
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
167 inline HexagonBlockRanges::IndexType::operator unsigned() const {
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
168 assert(Index >= First);
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
169 return Index;
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
170 }
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
171
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
172 inline bool HexagonBlockRanges::IndexType::operator== (unsigned x) const {
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
173 return Index == x;
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
174 }
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
175
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
176 inline bool HexagonBlockRanges::IndexType::operator== (IndexType Idx) const {
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
177 return Index == Idx.Index;
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
178 }
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
179
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
180 inline bool HexagonBlockRanges::IndexType::operator!= (unsigned x) const {
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
181 return Index != x;
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
182 }
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
183
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
184 inline bool HexagonBlockRanges::IndexType::operator!= (IndexType Idx) const {
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
185 return Index != Idx.Index;
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
186 }
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
187
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
188 inline
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
189 HexagonBlockRanges::IndexType HexagonBlockRanges::IndexType::operator++ () {
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
190 assert(Index != None);
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
191 assert(Index != Exit);
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
192 if (Index == Entry)
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
193 Index = First;
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
194 else
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
195 ++Index;
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
196 return *this;
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
197 }
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
198
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
199 inline bool HexagonBlockRanges::IndexType::operator< (unsigned Idx) const {
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
200 return operator< (IndexType(Idx));
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
201 }
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
202
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
203 inline bool HexagonBlockRanges::IndexType::operator< (IndexType Idx) const {
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
204 // !(x < x).
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
205 if (Index == Idx.Index)
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
206 return false;
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
207 // !(None < x) for all x.
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
208 // !(x < None) for all x.
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
209 if (Index == None || Idx.Index == None)
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
210 return false;
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
211 // !(Exit < x) for all x.
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
212 // !(x < Entry) for all x.
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
213 if (Index == Exit || Idx.Index == Entry)
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
214 return false;
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
215 // Entry < x for all x != Entry.
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
216 // x < Exit for all x != Exit.
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
217 if (Index == Entry || Idx.Index == Exit)
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
218 return true;
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
219
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
220 return Index < Idx.Index;
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
221 }
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
222
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
223 inline bool HexagonBlockRanges::IndexType::operator<= (IndexType Idx) const {
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
224 return operator==(Idx) || operator<(Idx);
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
225 }
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
226
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
227
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
228 raw_ostream &operator<< (raw_ostream &OS, HexagonBlockRanges::IndexType Idx);
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
229 raw_ostream &operator<< (raw_ostream &OS,
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
230 const HexagonBlockRanges::IndexRange &IR);
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
231 raw_ostream &operator<< (raw_ostream &OS,
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
232 const HexagonBlockRanges::RangeList &RL);
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
233 raw_ostream &operator<< (raw_ostream &OS,
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
234 const HexagonBlockRanges::InstrIndexMap &M);
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
235 raw_ostream &operator<< (raw_ostream &OS,
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
236 const HexagonBlockRanges::PrintRangeMap &P);
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
237
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
238 } // namespace llvm
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
239
1172e4bd9c6f update 4.0.0
mir3636
parents:
diff changeset
240 #endif