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annotate lib/Target/NVPTX/NVPTXFrameLowering.cpp @ 120:1172e4bd9c6f

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update 4.0.0
author mir3636
date Fri, 25 Nov 2016 19:14:25 +0900
parents afa8332a0e37
children 3a76565eade5
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1 //=======- NVPTXFrameLowering.cpp - NVPTX Frame Information ---*- C++ -*-=====//
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2 //
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3 // The LLVM Compiler Infrastructure
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4 //
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5 // This file is distributed under the University of Illinois Open Source
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6 // License. See LICENSE.TXT for details.
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7 //
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8 //===----------------------------------------------------------------------===//
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9 //
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10 // This file contains the NVPTX implementation of TargetFrameLowering class.
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11 //
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12 //===----------------------------------------------------------------------===//
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13
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14 #include "NVPTXFrameLowering.h"
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15 #include "NVPTX.h"
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16 #include "NVPTXRegisterInfo.h"
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17 #include "NVPTXSubtarget.h"
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18 #include "NVPTXTargetMachine.h"
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19 #include "llvm/CodeGen/MachineFrameInfo.h"
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20 #include "llvm/CodeGen/MachineFunction.h"
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21 #include "llvm/CodeGen/MachineInstrBuilder.h"
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22 #include "llvm/CodeGen/MachineRegisterInfo.h"
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23 #include "llvm/MC/MachineLocation.h"
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24 #include "llvm/Target/TargetInstrInfo.h"
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25
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26 using namespace llvm;
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28 NVPTXFrameLowering::NVPTXFrameLowering()
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29 : TargetFrameLowering(TargetFrameLowering::StackGrowsUp, 8, 0) {}
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31 bool NVPTXFrameLowering::hasFP(const MachineFunction &MF) const { return true; }
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32
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33 void NVPTXFrameLowering::emitPrologue(MachineFunction &MF,
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34 MachineBasicBlock &MBB) const {
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35 if (MF.getFrameInfo().hasStackObjects()) {
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36 assert(&MF.front() == &MBB && "Shrink-wrapping not yet supported");
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37 MachineInstr *MI = &MBB.front();
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38 MachineRegisterInfo &MR = MF.getRegInfo();
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39
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40 // This instruction really occurs before first instruction
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41 // in the BB, so giving it no debug location.
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42 DebugLoc dl = DebugLoc();
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43
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44 // Emits
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45 // mov %SPL, %depot;
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46 // cvta.local %SP, %SPL;
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47 // for local address accesses in MF.
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48 bool Is64Bit =
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49 static_cast<const NVPTXTargetMachine &>(MF.getTarget()).is64Bit();
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50 unsigned CvtaLocalOpcode =
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51 (Is64Bit ? NVPTX::cvta_local_yes_64 : NVPTX::cvta_local_yes);
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52 unsigned MovDepotOpcode =
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53 (Is64Bit ? NVPTX::MOV_DEPOT_ADDR_64 : NVPTX::MOV_DEPOT_ADDR);
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54 if (!MR.use_empty(NVPTX::VRFrame)) {
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55 // If %SP is not used, do not bother emitting "cvta.local %SP, %SPL".
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56 MI = BuildMI(MBB, MI, dl,
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57 MF.getSubtarget().getInstrInfo()->get(CvtaLocalOpcode),
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58 NVPTX::VRFrame)
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59 .addReg(NVPTX::VRFrameLocal);
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60 }
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61 BuildMI(MBB, MI, dl, MF.getSubtarget().getInstrInfo()->get(MovDepotOpcode),
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62 NVPTX::VRFrameLocal)
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63 .addImm(MF.getFunctionNumber());
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64 }
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65 }
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67 void NVPTXFrameLowering::emitEpilogue(MachineFunction &MF,
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68 MachineBasicBlock &MBB) const {}
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69
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70 // This function eliminates ADJCALLSTACKDOWN,
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71 // ADJCALLSTACKUP pseudo instructions
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72 MachineBasicBlock::iterator NVPTXFrameLowering::eliminateCallFramePseudoInstr(
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73 MachineFunction &MF, MachineBasicBlock &MBB,
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74 MachineBasicBlock::iterator I) const {
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75 // Simply discard ADJCALLSTACKDOWN,
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76 // ADJCALLSTACKUP instructions.
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77 return MBB.erase(I);
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78 }