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1 # RUN: llc -march=amdgcn -run-pass liveintervals -verify-machineinstrs -o /dev/null -debug-only=regalloc %s 2>&1 | FileCheck %s
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2 # REQUIRES: asserts
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3 # We currently maintain a main liveness range which operates like a superset of
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4 # all subregister liveranges. We may need to create additional SSA values at
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5 # merge point in this main liverange even though none of the subregister
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6 # liveranges needed it.
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7 #
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8 # Should see three distinct value numbers:
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9 # CHECK: %vreg0 [{{.*}}:0)[{{.*}}:1)[{{.*}}:2) 0@{{[0-9]+[Berd]}} 1@{{[0-9]+[Berd]}} 2@{{[0-9]+B-phi}}
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10 --- |
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11 define void @test0() { ret void }
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12 ...
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13 ---
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14 name: test0
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15 registers:
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16 - { id: 0, class: sreg_64 }
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17 body: |
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18 bb.0:
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19 successors: %bb.1, %bb.2
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20 S_NOP 0, implicit-def undef %0.sub0
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21 S_CBRANCH_VCCNZ %bb.1, implicit undef %vcc
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22 S_BRANCH %bb.2
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23
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24 bb.1:
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25 successors: %bb.2
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26 S_NOP 0, implicit-def %0.sub1
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27 S_NOP 0, implicit %0.sub1
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28 S_BRANCH %bb.2
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29
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30 bb.2:
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31 S_NOP 0, implicit %0.sub0
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32 ...
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