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annotate test/CodeGen/Hexagon/sube.ll @ 120:1172e4bd9c6f

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update 4.0.0
author mir3636
date Fri, 25 Nov 2016 19:14:25 +0900
parents 7d135dc70f03
children 803732b1fca8
Ignore whitespace changes - Everywhere: Within whitespace: At end of lines:
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120
1172e4bd9c6f update 4.0.0
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1 ; RUN: llc -march=hexagon -disable-hsdr -hexagon-expand-condsets=0 -hexagon-bit=0 -disable-post-ra < %s | FileCheck %s
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1172e4bd9c6f update 4.0.0
mir3636
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3 ; CHECK: r{{[0-9]+:[0-9]+}} = combine(#0, #0)
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7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
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4 ; CHECK: r{{[0-9]+:[0-9]+}} = combine(#0, #1)
0
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5 ; CHECK: p{{[0-9]+}} = cmp.gtu(r{{[0-9]+:[0-9]+}}, r{{[0-9]+:[0-9]+}})
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afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 0
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6 ; CHECK: r{{[0-9]+:[0-9]+}} = sub(r{{[0-9]+:[0-9]+}}, r{{[0-9]+:[0-9]+}})
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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7 ; CHECK: r{{[0-9]+}} = mux(p{{[0-9]+}}, r{{[0-9]+}}, r{{[0-9]+}})
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8 ; CHECK: r{{[0-9]+}} = mux(p{{[0-9]+}}, r{{[0-9]+}}, r{{[0-9]+}})
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7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
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9 ; CHECK: r{{[0-9]+:[0-9]+}} = sub(r{{[0-9]+:[0-9]+}}, r{{[0-9]+:[0-9]+}})
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10 ; CHECK: r{{[0-9]+:[0-9]+}} = combine(r{{[0-9]+}}, r{{[0-9]+}})
95c75e76d11b LLVM 3.4
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11
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12 define void @check_sube_subc(i64 %AL, i64 %AH, i64 %BL, i64 %BH, i64* %RL, i64* %RH) {
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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13 entry:
95c75e76d11b LLVM 3.4
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14 %tmp1 = zext i64 %AL to i128
95c75e76d11b LLVM 3.4
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15 %tmp23 = zext i64 %AH to i128
95c75e76d11b LLVM 3.4
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16 %tmp4 = shl i128 %tmp23, 64
95c75e76d11b LLVM 3.4
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17 %tmp5 = or i128 %tmp4, %tmp1
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18 %tmp67 = zext i64 %BL to i128
95c75e76d11b LLVM 3.4
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19 %tmp89 = zext i64 %BH to i128
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20 %tmp11 = shl i128 %tmp89, 64
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21 %tmp12 = or i128 %tmp11, %tmp67
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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22 %tmp15 = sub i128 %tmp5, %tmp12
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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23 %tmp1617 = trunc i128 %tmp15 to i64
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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24 store i64 %tmp1617, i64* %RL
95c75e76d11b LLVM 3.4
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25 %tmp21 = lshr i128 %tmp15, 64
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26 %tmp2122 = trunc i128 %tmp21 to i64
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27 store i64 %tmp2122, i64* %RH
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28 ret void
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29 }