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annotate test/CodeGen/PowerPC/bswap-load-store.ll @ 120:1172e4bd9c6f

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update 4.0.0
author mir3636
date Fri, 25 Nov 2016 19:14:25 +0900
parents afa8332a0e37
children 803732b1fca8
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1172e4bd9c6f update 4.0.0
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1 ; RUN: llc -verify-machineinstrs < %s -march=ppc32 -mcpu=ppc32 | FileCheck %s -check-prefix=X32
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2 ; RUN: llc -verify-machineinstrs < %s -march=ppc64 -mcpu=ppc64 | FileCheck %s -check-prefix=X64
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3 ; RUN: llc -verify-machineinstrs < %s -march=ppc64 -mcpu=pwr7 | FileCheck %s -check-prefix=PWR7
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4 ; RUN: llc -verify-machineinstrs < %s -march=ppc32 -mcpu=pwr7 | FileCheck %s -check-prefix=X32
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7 define void @STWBRX(i32 %i, i8* %ptr, i32 %off) {
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8 %tmp1 = getelementptr i8, i8* %ptr, i32 %off ; <i8*> [#uses=1]
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9 %tmp1.upgrd.1 = bitcast i8* %tmp1 to i32* ; <i32*> [#uses=1]
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10 %tmp13 = tail call i32 @llvm.bswap.i32( i32 %i ) ; <i32> [#uses=1]
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11 store i32 %tmp13, i32* %tmp1.upgrd.1
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12 ret void
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13 }
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14
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15 define i32 @LWBRX(i8* %ptr, i32 %off) {
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16 %tmp1 = getelementptr i8, i8* %ptr, i32 %off ; <i8*> [#uses=1]
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17 %tmp1.upgrd.2 = bitcast i8* %tmp1 to i32* ; <i32*> [#uses=1]
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18 %tmp = load i32, i32* %tmp1.upgrd.2 ; <i32> [#uses=1]
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19 %tmp14 = tail call i32 @llvm.bswap.i32( i32 %tmp ) ; <i32> [#uses=1]
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20 ret i32 %tmp14
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21 }
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23 define void @STHBRX(i16 %s, i8* %ptr, i32 %off) {
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24 %tmp1 = getelementptr i8, i8* %ptr, i32 %off ; <i8*> [#uses=1]
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25 %tmp1.upgrd.3 = bitcast i8* %tmp1 to i16* ; <i16*> [#uses=1]
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26 %tmp5 = call i16 @llvm.bswap.i16( i16 %s ) ; <i16> [#uses=1]
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27 store i16 %tmp5, i16* %tmp1.upgrd.3
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28 ret void
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29 }
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31 define i16 @LHBRX(i8* %ptr, i32 %off) {
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32 %tmp1 = getelementptr i8, i8* %ptr, i32 %off ; <i8*> [#uses=1]
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33 %tmp1.upgrd.4 = bitcast i8* %tmp1 to i16* ; <i16*> [#uses=1]
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34 %tmp = load i16, i16* %tmp1.upgrd.4 ; <i16> [#uses=1]
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35 %tmp6 = call i16 @llvm.bswap.i16( i16 %tmp ) ; <i16> [#uses=1]
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36 ret i16 %tmp6
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37 }
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39 define void @STDBRX(i64 %i, i8* %ptr, i64 %off) {
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40 %tmp1 = getelementptr i8, i8* %ptr, i64 %off ; <i8*> [#uses=1]
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41 %tmp1.upgrd.1 = bitcast i8* %tmp1 to i64* ; <i64*> [#uses=1]
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42 %tmp13 = tail call i64 @llvm.bswap.i64( i64 %i ) ; <i64> [#uses=1]
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43 store i64 %tmp13, i64* %tmp1.upgrd.1
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44 ret void
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45 }
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47 define i64 @LDBRX(i8* %ptr, i64 %off) {
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48 %tmp1 = getelementptr i8, i8* %ptr, i64 %off ; <i8*> [#uses=1]
0
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49 %tmp1.upgrd.2 = bitcast i8* %tmp1 to i64* ; <i64*> [#uses=1]
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50 %tmp = load i64, i64* %tmp1.upgrd.2 ; <i64> [#uses=1]
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51 %tmp14 = tail call i64 @llvm.bswap.i64( i64 %tmp ) ; <i64> [#uses=1]
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52 ret i64 %tmp14
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53 }
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55 declare i32 @llvm.bswap.i32(i32)
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56
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57 declare i16 @llvm.bswap.i16(i16)
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58
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59 declare i64 @llvm.bswap.i64(i64)
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61
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62 ; X32: stwbrx
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63 ; X32: lwbrx
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64 ; X32: sthbrx
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65 ; X32: lhbrx
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66 ; X32-NOT: ldbrx
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67 ; X32-NOT: stdbrx
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68
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69 ; X64: stwbrx
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70 ; X64: lwbrx
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71 ; X64: sthbrx
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72 ; X64: lhbrx
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73 ; X64-NOT: ldbrx
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74 ; X64-NOT: stdbrx
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75
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76 ; PWR7: stwbrx
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77 ; PWR7: lwbrx
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78 ; PWR7: sthbrx
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79 ; PWR7: lhbrx
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80 ; PWR7: stdbrx
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81 ; PWR7: ldbrx
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82