annotate test/CodeGen/SystemZ/loop-01.ll @ 120:1172e4bd9c6f

update 4.0.0
author mir3636
date Fri, 25 Nov 2016 19:14:25 +0900
parents afa8332a0e37
children 803732b1fca8
Ignore whitespace changes - Everywhere: Within whitespace: At end of lines:
rev   line source
0
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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1 ; Test loop tuning.
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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2 ;
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3 ; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z10 | FileCheck %s
120
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4 ; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z13 \
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5 ; RUN: | FileCheck %s -check-prefix=CHECK -check-prefix=CHECK-Z13
0
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6
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7 ; Test that strength reduction is applied to addresses with a scale factor,
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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8 ; but that indexed addressing can still be used.
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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9 define void @f1(i32 *%dest, i32 %a) {
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10 ; CHECK-LABEL: f1:
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11 ; CHECK-NOT: sllg
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12 ; CHECK: st %r3, 0({{%r[1-5],%r[1-5]}})
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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13 ; CHECK: br %r14
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14 entry:
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15 br label %loop
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16
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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17 loop:
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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18 %index = phi i64 [ 0, %entry ], [ %next, %loop ]
95
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parents: 0
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19 %ptr = getelementptr i32, i32 *%dest, i64 %index
0
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20 store i32 %a, i32 *%ptr
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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21 %next = add i64 %index, 1
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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22 %cmp = icmp ne i64 %next, 100
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23 br i1 %cmp, label %loop, label %exit
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24
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25 exit:
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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26 ret void
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27 }
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28
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29 ; Test a loop that should be converted into dbr form and then use BRCT.
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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30 define void @f2(i32 *%src, i32 *%dest) {
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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31 ; CHECK-LABEL: f2:
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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32 ; CHECK: lhi [[REG:%r[0-5]]], 100
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33 ; CHECK: [[LABEL:\.[^:]*]]:{{.*}} %loop
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34 ; CHECK: brct [[REG]], [[LABEL]]
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35 ; CHECK: br %r14
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36 entry:
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37 br label %loop
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38
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39 loop:
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40 %count = phi i32 [ 0, %entry ], [ %next, %loop.next ]
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41 %next = add i32 %count, 1
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42 %val = load volatile i32 , i32 *%src
0
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43 %cmp = icmp eq i32 %val, 0
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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44 br i1 %cmp, label %loop.next, label %loop.store
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45
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46 loop.store:
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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47 %add = add i32 %val, 1
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48 store volatile i32 %add, i32 *%dest
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49 br label %loop.next
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50
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51 loop.next:
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52 %cont = icmp ne i32 %next, 100
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53 br i1 %cont, label %loop, label %exit
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54
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55 exit:
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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56 ret void
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57 }
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58
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59 ; Like f2, but for BRCTG.
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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60 define void @f3(i64 *%src, i64 *%dest) {
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61 ; CHECK-LABEL: f3:
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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62 ; CHECK: lghi [[REG:%r[0-5]]], 100
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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63 ; CHECK: [[LABEL:\.[^:]*]]:{{.*}} %loop
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64 ; CHECK: brctg [[REG]], [[LABEL]]
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65 ; CHECK: br %r14
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66 entry:
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67 br label %loop
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68
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69 loop:
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70 %count = phi i64 [ 0, %entry ], [ %next, %loop.next ]
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71 %next = add i64 %count, 1
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72 %val = load volatile i64 , i64 *%src
0
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73 %cmp = icmp eq i64 %val, 0
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74 br i1 %cmp, label %loop.next, label %loop.store
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75
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76 loop.store:
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77 %add = add i64 %val, 1
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78 store volatile i64 %add, i64 *%dest
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79 br label %loop.next
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80
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81 loop.next:
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82 %cont = icmp ne i64 %next, 100
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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83 br i1 %cont, label %loop, label %exit
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84
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85 exit:
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86 ret void
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87 }
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88
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89 ; Test a loop with a 64-bit decremented counter in which the 32-bit
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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90 ; low part of the counter is used after the decrement. This is an example
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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91 ; of a subregister use being the only thing that blocks a conversion to BRCTG.
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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92 define void @f4(i32 *%src, i32 *%dest, i64 *%dest2, i64 %count) {
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parents:
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93 ; CHECK-LABEL: f4:
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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94 ; CHECK: aghi [[REG:%r[0-5]]], -1
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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95 ; CHECK: lr [[REG2:%r[0-5]]], [[REG]]
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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96 ; CHECK: stg [[REG2]],
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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97 ; CHECK: jne {{\..*}}
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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98 ; CHECK: br %r14
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parents:
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99 entry:
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100 br label %loop
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101
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102 loop:
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parents:
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103 %left = phi i64 [ %count, %entry ], [ %next, %loop.next ]
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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104 store volatile i64 %left, i64 *%dest2
95
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105 %val = load volatile i32 , i32 *%src
0
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parents:
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106 %cmp = icmp eq i32 %val, 0
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parents:
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107 br i1 %cmp, label %loop.next, label %loop.store
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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108
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109 loop.store:
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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110 %add = add i32 %val, 1
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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111 store volatile i32 %add, i32 *%dest
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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112 br label %loop.next
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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113
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parents:
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114 loop.next:
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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115 %next = add i64 %left, -1
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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116 %ext = zext i32 %val to i64
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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117 %shl = shl i64 %ext, 32
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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118 %and = and i64 %next, 4294967295
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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119 %or = or i64 %shl, %and
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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120 store volatile i64 %or, i64 *%dest2
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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121 %cont = icmp ne i64 %next, 0
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parents:
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122 br i1 %cont, label %loop, label %exit
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parents:
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123
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124 exit:
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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125 ret void
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parents:
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126 }
120
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127
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128 ; Test that negative offsets are avoided for loads of floating point.
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129 %s.float = type { float, float, float }
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130 define void @f5(%s.float* nocapture %a,
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131 %s.float* nocapture readonly %b,
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132 i32 zeroext %S) {
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133 ; CHECK-Z13-LABEL: f5:
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134 ; CHECK-Z13-NOT: -{{[0-9]+}}(%r
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135
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136 entry:
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137 %cmp9 = icmp eq i32 %S, 0
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138 br i1 %cmp9, label %for.cond.cleanup, label %for.body.preheader
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139
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140 for.body.preheader: ; preds = %entry
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141 br label %for.body
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142
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143 for.cond.cleanup.loopexit: ; preds = %for.body
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144 br label %for.cond.cleanup
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145
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146 for.cond.cleanup: ; preds = %for.cond.cleanup.loopexit, %entry
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147 ret void
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148
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149 for.body: ; preds = %for.body.preheader, %for.body
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150 %indvars.iv = phi i64 [ %indvars.iv.next, %for.body ], [ 0, %for.body.preheader ]
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151 %a1 = getelementptr inbounds %s.float, %s.float* %b, i64 %indvars.iv, i32 0
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152 %tmp = load float, float* %a1, align 4
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153 %b4 = getelementptr inbounds %s.float, %s.float* %b, i64 %indvars.iv, i32 1
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154 %tmp1 = load float, float* %b4, align 4
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155 %add = fadd float %tmp, %tmp1
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156 %c = getelementptr inbounds %s.float, %s.float* %b, i64 %indvars.iv, i32 2
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157 %tmp2 = load float, float* %c, align 4
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158 %add7 = fadd float %add, %tmp2
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159 %a10 = getelementptr inbounds %s.float, %s.float* %a, i64 %indvars.iv, i32 0
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160 store float %add7, float* %a10, align 4
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161 %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
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162 %lftr.wideiv = trunc i64 %indvars.iv.next to i32
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163 %exitcond = icmp eq i32 %lftr.wideiv, %S
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164 br i1 %exitcond, label %for.cond.cleanup.loopexit, label %for.body
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165 }
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166
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167 ; Test that negative offsets are avoided for loads of double.
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168 %s.double = type { double, double, double }
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169 define void @f6(%s.double* nocapture %a,
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170 %s.double* nocapture readonly %b,
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171 i32 zeroext %S) {
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172 ; CHECK-Z13-LABEL: f6:
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173 ; CHECK-Z13-NOT: -{{[0-9]+}}(%r
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174 entry:
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175 %cmp9 = icmp eq i32 %S, 0
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176 br i1 %cmp9, label %for.cond.cleanup, label %for.body.preheader
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177
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178 for.body.preheader: ; preds = %entry
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179 br label %for.body
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180
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181 for.cond.cleanup.loopexit: ; preds = %for.body
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182 br label %for.cond.cleanup
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183
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184 for.cond.cleanup: ; preds = %for.cond.cleanup.loopexit, %entry
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185 ret void
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186
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187 for.body: ; preds = %for.body.preheader, %for.body
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188 %indvars.iv = phi i64 [ %indvars.iv.next, %for.body ], [ 0, %for.body.preheader ]
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189 %a1 = getelementptr inbounds %s.double, %s.double* %b, i64 %indvars.iv, i32 0
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190 %tmp = load double, double* %a1, align 4
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191 %b4 = getelementptr inbounds %s.double, %s.double* %b, i64 %indvars.iv, i32 1
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192 %tmp1 = load double, double* %b4, align 4
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193 %add = fadd double %tmp, %tmp1
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194 %c = getelementptr inbounds %s.double, %s.double* %b, i64 %indvars.iv, i32 2
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195 %tmp2 = load double, double* %c, align 4
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196 %add7 = fadd double %add, %tmp2
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197 %a10 = getelementptr inbounds %s.double, %s.double* %a, i64 %indvars.iv, i32 0
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198 store double %add7, double* %a10, align 4
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199 %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
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200 %lftr.wideiv = trunc i64 %indvars.iv.next to i32
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201 %exitcond = icmp eq i32 %lftr.wideiv, %S
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202 br i1 %exitcond, label %for.cond.cleanup.loopexit, label %for.body
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203 }
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204
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205 ; Test that negative offsets are avoided for memory accesses of vector type.
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206 %s.vec = type { <4 x i32>, <4 x i32>, <4 x i32> }
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207 define void @f7(%s.vec* nocapture %a,
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208 %s.vec* nocapture readonly %b,
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209 i32 zeroext %S) {
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210 ; CHECK-Z13-LABEL: f7:
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211 ; CHECK-Z13-NOT: -{{[0-9]+}}(%r
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212 entry:
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213 %cmp9 = icmp eq i32 %S, 0
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214 br i1 %cmp9, label %for.cond.cleanup, label %for.body.preheader
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215
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216 for.body.preheader: ; preds = %entry
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217 br label %for.body
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218
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219 for.cond.cleanup.loopexit: ; preds = %for.body
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220 br label %for.cond.cleanup
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221
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222 for.cond.cleanup: ; preds = %for.cond.cleanup.loopexit, %entry
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223 ret void
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224
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225 for.body: ; preds = %for.body.preheader, %for.body
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226 %indvars.iv = phi i64 [ %indvars.iv.next, %for.body ], [ 0, %for.body.preheader ]
1172e4bd9c6f update 4.0.0
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diff changeset
227 %a1 = getelementptr inbounds %s.vec, %s.vec* %b, i64 %indvars.iv, i32 0
1172e4bd9c6f update 4.0.0
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228 %tmp = load <4 x i32>, <4 x i32>* %a1, align 4
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229 %b4 = getelementptr inbounds %s.vec, %s.vec* %b, i64 %indvars.iv, i32 1
1172e4bd9c6f update 4.0.0
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diff changeset
230 %tmp1 = load <4 x i32>, <4 x i32>* %b4, align 4
1172e4bd9c6f update 4.0.0
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231 %add = add <4 x i32> %tmp1, %tmp
1172e4bd9c6f update 4.0.0
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232 %c = getelementptr inbounds %s.vec, %s.vec* %b, i64 %indvars.iv, i32 2
1172e4bd9c6f update 4.0.0
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diff changeset
233 %tmp2 = load <4 x i32>, <4 x i32>* %c, align 4
1172e4bd9c6f update 4.0.0
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diff changeset
234 %add7 = add <4 x i32> %add, %tmp2
1172e4bd9c6f update 4.0.0
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diff changeset
235 %a10 = getelementptr inbounds %s.vec, %s.vec* %a, i64 %indvars.iv, i32 0
1172e4bd9c6f update 4.0.0
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diff changeset
236 store <4 x i32> %add7, <4 x i32>* %a10, align 4
1172e4bd9c6f update 4.0.0
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diff changeset
237 %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
1172e4bd9c6f update 4.0.0
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diff changeset
238 %lftr.wideiv = trunc i64 %indvars.iv.next to i32
1172e4bd9c6f update 4.0.0
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diff changeset
239 %exitcond = icmp eq i32 %lftr.wideiv, %S
1172e4bd9c6f update 4.0.0
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diff changeset
240 br i1 %exitcond, label %for.cond.cleanup.loopexit, label %for.body
1172e4bd9c6f update 4.0.0
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241 }