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150
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1 ;RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck %s
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2
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3 ; This test is for a bug in
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4 ; DAGCombiner::reduceBuildVecConvertToConvertBuildVec() where
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5 ; the wrong type was being passed to
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6 ; TargetLowering::getOperationAction() when checking the legality of
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7 ; ISD::UINT_TO_FP and ISD::SINT_TO_FP opcodes.
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8
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9
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10 ; CHECK: {{^}}sint:
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11 ; CHECK: INT_TO_FLT * T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
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12
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13 define amdgpu_kernel void @sint(<4 x float> addrspace(1)* %out, i32 addrspace(1)* %in) {
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14 entry:
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15 %ptr = getelementptr i32, i32 addrspace(1)* %in, i32 1
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16 %sint = load i32, i32 addrspace(1) * %in
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17 %conv = sitofp i32 %sint to float
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18 %0 = insertelement <4 x float> undef, float %conv, i32 0
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19 %splat = shufflevector <4 x float> %0, <4 x float> undef, <4 x i32> zeroinitializer
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20 store <4 x float> %splat, <4 x float> addrspace(1)* %out
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21 ret void
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22 }
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23
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24 ;CHECK: {{^}}uint:
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25 ;CHECK: UINT_TO_FLT * T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
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26
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27 define amdgpu_kernel void @uint(<4 x float> addrspace(1)* %out, i32 addrspace(1)* %in) {
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28 entry:
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29 %ptr = getelementptr i32, i32 addrspace(1)* %in, i32 1
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30 %uint = load i32, i32 addrspace(1) * %in
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31 %conv = uitofp i32 %uint to float
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32 %0 = insertelement <4 x float> undef, float %conv, i32 0
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33 %splat = shufflevector <4 x float> %0, <4 x float> undef, <4 x i32> zeroinitializer
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34 store <4 x float> %splat, <4 x float> addrspace(1)* %out
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35 ret void
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36 }
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