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annotate llvm/test/CodeGen/AMDGPU/fneg-combines.si.ll @ 150:1d019706d866

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LLVM10
author anatofuz
date Thu, 13 Feb 2020 15:10:13 +0900
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children 2e18cbf3894f
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150
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1 ; RUN: llc -march=amdgcn -mcpu=tahiti -start-after=sink -verify-machineinstrs < %s | FileCheck -enable-var-scope -check-prefix=GCN -check-prefix=GCN-SAFE -check-prefix=SI -check-prefix=FUNC %s
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2 ; RUN: llc -enable-no-signed-zeros-fp-math -march=amdgcn -mcpu=tahiti -start-after=sink -verify-machineinstrs < %s | FileCheck -enable-var-scope -check-prefix=GCN -check-prefix=GCN-NSZ -check-prefix=SI -check-prefix=FUNC %s
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3
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4 ; --------------------------------------------------------------------------------
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5 ; rcp_legacy tests
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6 ; --------------------------------------------------------------------------------
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7
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8 ; GCN-LABEL: {{^}}v_fneg_rcp_legacy_f32:
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9 ; GCN: {{buffer|flat}}_load_dword [[A:v[0-9]+]]
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10 ; GCN: v_rcp_legacy_f32_e64 [[RESULT:v[0-9]+]], -[[A]]
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11 ; GCN: {{buffer|flat}}_store_dword [[RESULT]]
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12 define amdgpu_kernel void @v_fneg_rcp_legacy_f32(float addrspace(1)* %out, float addrspace(1)* %a.ptr) #0 {
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13 %tid = call i32 @llvm.amdgcn.workitem.id.x()
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14 %tid.ext = sext i32 %tid to i64
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15 %a.gep = getelementptr inbounds float, float addrspace(1)* %a.ptr, i64 %tid.ext
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16 %out.gep = getelementptr inbounds float, float addrspace(1)* %out, i64 %tid.ext
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17 %a = load volatile float, float addrspace(1)* %a.gep
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18 %rcp = call float @llvm.amdgcn.rcp.legacy(float %a)
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19 %fneg = fsub float -0.000000e+00, %rcp
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20 store float %fneg, float addrspace(1)* %out.gep
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21 ret void
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22 }
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23
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24 declare i32 @llvm.amdgcn.workitem.id.x() #1
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25 declare float @llvm.amdgcn.rcp.legacy(float) #1
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26
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27 attributes #0 = { nounwind }
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28 attributes #1 = { nounwind readnone }